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Visitor levinson
Visitor
502 Views
Registered: ‎03-09-2019

Re: Transceiver DC Balance

Actually scramblers do NOT have DC balance. Their disparity is theoreticall unbounded. The 64b/67b Interlaken prototcol uses the 67th bit to indicate that the frame is inverted. In this way it keeps the disparity bounded.

3 Replies
Moderator
Moderator
440 Views
Registered: ‎07-30-2007

Re: Transceiver DC Balance

How does the DC balance work for the 64/66?  What I see on this is that it is theoretically unbalanced and can also give long run lengths that would violate specs but these events are "statisically bounded" making problems very unlikely.




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Advisor evgenis1
Advisor
427 Views
Registered: ‎12-03-2007

Re: Transceiver DC Balance

Hi @roym ,

Attached is an excerpt of how it works in PCI Express usng 128/130b encoding. In short, it's the responsibility of a transmitter to keep track of a proper DC balance, and send specially formatted packets to reduce the imbalance.

Thanks,

Evgeni

 

 

Tags (2)
pcie_dc_balance.jpg
Scholar drjohnsmith
Scholar
413 Views
Registered: ‎07-09-2009

Re: Transceiver DC Balance

Quick word.
8:10 encoding et all , have two codes for every symbol,
these are good for generating lots of clock frequency, and is easy to encode / decode, but one has a slight positive dc bias, one has a slight negative dc bias.
As said above, the transmitter switches which of the two codes to send for every symbol to keep the DC offset 'zeroed'.
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