05-21-2020 06:03 AM
Hello, I am using the ZCU-106 board and created a Video Block design that included a PS Processor Block and a 64Aurora Block. I right clicked on the 64Aurora Block and selected Open IP Example Design.
My question is how do I run the example design. Do I need to generate the Bit Stream and export the Hardware and then import that Hardware into Vitis? I have two Fiber-optic Transceivers that I have placed in the SFP+ connectors on the board and have connected a fiber optic cable from the TX port to the RX port.
Thank you,
Joe
05-22-2020 05:18 AM
Hello, and thanks for responding to my message. Looking closer on page 132 of PG074 it describes the 4 possible loopback modes. The modes are controlled by an input port on the IP block.
Thank you,
Joe
05-21-2020 08:18 AM
You should be able to run the example design by itself, although any way you run it you need to have a partner for it to talk to or arrange a loopback either through cable or set it to near end PMA loopback. Your cable should work. You should probably check the example design simulation to see that this kind of loopback will work for aurora but most of our example designs work with this kind of setup. Once you have the bitstream you should be able to load that into the FPGA and run it.
05-21-2020 08:51 AM
Hello, thank you for responding to my message. How do you do, "set it to near end PMA loopback"? Is that done in the 64BAurura IP?
Thank you
05-21-2020 08:11 PM - edited 05-23-2020 09:36 PM
I think that option is available under the settings tab. Just check it once bp credit card login
05-22-2020 05:18 AM
Hello, and thanks for responding to my message. Looking closer on page 132 of PG074 it describes the 4 possible loopback modes. The modes are controlled by an input port on the IP block.
Thank you,
Joe