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Contributor
Contributor
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Registered: ‎04-27-2018

Synchronous GTH lanes

Hi,

In the project I'm working on I have to synchronize multiple boards connected to a concentrator board through GTH transceivers.

I can achieve that by removing RX buffers and using the recovered clock on the endpoints and synchronizing the TX lanes on the concentrator for example using PICXO technique.

Such setup works fine in terms of stability but what I need more is to reduce the skew between recovered cloks on the endpoints or at least make it deterministic. At this moment, each restart results in different phase relationships between recovered clocks on the endpoints, even though the TXOUTCLKs for each lane on the concentrator board ale nicely aligned, not skewed.

There are many forum entries about simillar topics but I think they mostly concentrate on synchronizing multiple lanes received by a single device and not separate boards and most likely having a common reference clock. Do you have any hints or suggestions how to synchronize independent devices?

 

Cheers,

Greg Korcyl

 

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Moderator
Moderator
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Registered: ‎07-30-2007

I think you would have to make up your own protocol that has both clock correction and channel bonding that can be applied across separate interfaces.  There would be a latency hit but in the end you could align outputs to the same clock speed.  There are sections in the UG to teach about both channel boding and clock correction.  You would need to do the coding.  You need to have a means of keeping the data at the far end aligned within about 20 to 40 clock cycles.  Is this the case already? It seems to me any packetized protocol could be aligned by the packet markers which is what most users are doing.




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Contributor
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Registered: ‎04-27-2018

Thank you Roym for reply,

At this moment I'm able to synchronize the endpoints up to a single UI.

From the concentrator board I'm sending a special data word to all lanes, which is properly receivced by the endpoints.

On the attached scope screenshot you can see the TX reference clock for the lanes on the concentrator board (green) and recovered pulses which are the received special data words on two endpoints (blue and yellow). They are all nicely synchronized and stable over time but I need to reduce or at least fix the skew between blue and yellow. At this moment each reboot results in a different shift between them.

The endpoints are identical VCU108 boards with the same bitfiles, the optical fibers are of the same length, etc. I believe this is the CDR locking mechanism which should be investigated. 

clk.gif

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Moderator
Moderator
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Registered: ‎07-30-2007

Part of the reason for having embedded clocks inside the RX is that synchronizing multi gigabit bitstreams is like hearding cats.  You may be able to achieve this with the TX pi skew control but it would have to be redone on each reset.   You would probably have to use the techniques in this AR: http://www.xilinx.com/support/answers/70869.htm with some modification to use them on the RX side.  I don't know how close the alignment you are trying to achieve.  Jitter can be a huge problem on this and averaging techniques would have to be used at higher frequencies.

 




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Contributor
Contributor
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Registered: ‎04-27-2018

I did try to use the AR you are suggesting for TX. Finally, I have ended up with using PICXO from AR# 68928. It helps to align all TX lanes from the concentrator board by adjusting individual channels PIs. Having this I could say that the outgoing streams are aligned. Now I'm not sure what control do I have for the local clocks on the endpoints to get synchronized to the input streams with the CDR. On the RX path I have bypassed the buffers so AR# 70869 does not apply, moreover I think it would synchronize the RX clock to again some local system clock.
Having confidence that the TX clocks are fixed, I think one would have to manipulate with the CDR process to improve locking of the local RX clock to the input stream. But this, I don't know how to perform. What do you think?
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