07-28-2020 03:08 AM
I have a question about the status of the clock coming from transceivers txoutclk and rxoutclk when the power down ports (txpd and rxpd) are active (="11", lowest power state). My question is if in case GTX 7 series, GTH ultrascale plus and GTY ultrascale plus trasnceivers these clocks are up or down and if the up/down state depends on the clock source selected or if it is equivalent for all the possible clock sources.
08-10-2020 07:33 AM
When the GT is powered down the T/RXOUTCLK's are undefined. If you want to use them leave the GT's powered on.
08-10-2020 01:58 PM
It means we won't guarantee anything. It is not a supported use case. It should probably be floating since we are actively powering down everything we can to save power.
Your best bet is to simulate if you can't work around this. The RXOUTCLK stops when RXPD is set to 3 although the TXOUTCLK keeps running with TXPD set to 3 and doesn't stop unless TXPISOPD is set high. Your configuration could work differently so a simulation on your own design would be your best bet.
08-11-2020 11:05 PM
ok, seems to be clearer but still have a doubt. Searching for TXPISOPD signal I found this AR#56900 that seems to be valid at least for 7 series transceivers. Questions are:
1)are the same settings to have a full and complete power down of all TX logic valid also for GTY Ultrascale plus?
2)Does it mean that applying only TXPD we are turning off only the serial line driver (so all the rest of TX logic such as dividers...) still remains on?
08-12-2020 08:35 AM
There are more power savings available but the set up is a little different in US+. You are getting more power savings with a setting of TXPD = 3 as 7-series didn't have this option. You can still get more savings by powering down more and it looks like all of the other PD's are still there. Just open the implemented design highlight a GT, go to properties and search for *PD.