cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
rajuponnaganti
Voyager
Voyager
7,758 Views
Registered: ‎03-12-2015

Testing GTX transceivers Using IBERT

We have VC707 baord and 4-port SFP/SFP+ module. We want to test eight GTX transceivers (MGT_BANK_117 & MGT_BANK_119).To test GTX transceivers, we are using IBERT core.We are giving external reference clock 125 MHz, Sys clk is 200 MHz( Pins:E19,E18).I attached Zip file below which contained results and modules what we are using and setup too.

For Near End , it(FMC1) is working fine, Coming to far end, both are not working.What could be the reason?

REF CLK 125MHz, Line Rate 3.125Gbps.

0 Kudos
15 Replies
athandr
Xilinx Employee
Xilinx Employee
7,728 Views
Registered: ‎07-31-2012

Put the source (where you are observing the link) in "none" mode and the destination FPGA in far end PCS/PMA mode. Check the status in the Source FPGA.
Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.
0 Kudos
rajuponnaganti
Voyager
Voyager
7,723 Views
Registered: ‎03-12-2015

As you said, i set none mode, no link took place.what could be the reason? how to resolve it?

0 Kudos
athandr
Xilinx Employee
Xilinx Employee
7,719 Views
Registered: ‎07-31-2012

Did you put the destination FPGA in the far end PCS/PMA mode?
Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.
0 Kudos
rajuponnaganti
Voyager
Voyager
7,715 Views
Registered: ‎03-12-2015

I just want to do loopback test.I connected ofc cable between two sfps.
0 Kudos
mcgett
Xilinx Employee
Xilinx Employee
7,702 Views
Registered: ‎01-03-2008

> I just want to do loopback test.I connected ofc cable between two sfps.

 

Q1 - How many FMC cards are you using? 

      Q1.1 - If the answer is not two then which interface is the FMC card connect to on the VC707?

 

Q2 -  How many SFP modules are you using?

     Q2.1 - If the answer is not eight (two FMC cards) or four (one FMC card) then which SFP cages are the SFP modules plugged into?

 

Q3 - How have you connected the optical cables between the SFP modules?  This should be express in the following form:

      Link 0 - FMC#.SFP# to FMC#.SFP#

      Link 1 - FMC#.SFP# to FMC#.SFP#  

      Link 2 - FMC#.SFP# to FMC#.SFP#
      Link 3 - FMC#.SFP# to FMC#.SFP#

 

Q4 - Please provide a picture of your setup.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
0 Kudos
rajuponnaganti
Voyager
Voyager
7,693 Views
Registered: ‎03-12-2015

How many FMC cards are you using?

A: I am using Two FMC cards

 

How many SFP modules are you using?

A: 8

 

 

How have you connected the optical cables between the SFP modules?  This should be express in the following form:

A:

We have two OFC cables.While testing, we connected as per requirement.

 

Please provide a picture of your setup.

A:attached zip file which have setup images.

0 Kudos
athandr
Xilinx Employee
Xilinx Employee
7,688 Views
Registered: ‎07-31-2012

Sure, i understand this is a loopback test.
Irrespective of whether it is between two different FPGA's or looped back in the same FPGA, you would have a TX and and RX.

So here is how you should setup
1) Connect TX to RX through an external cable (SFP) in your case
2) Now setup ibert in TX and put it in none mode (Observe the link in TX)
3) Now setup the ibert in RX (or you need not setup also) and put it in far end pcs/pma mode.
4) Now check the link in TX GT ibert link only

For more information on the far end near end clarity, please check the UG476 which has a clear diagram on this.
Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.
0 Kudos
mcgett
Xilinx Employee
Xilinx Employee
7,676 Views
Registered: ‎01-03-2008

>>How have you connected the optical cables between the SFP modules?  This should be express in the following form:

>A: We have two OFC cables.While testing, we connected as per requirement.

 

It is frustrating when you do not provide full and complete information as requested.  This has been a common occurence in this thread and your others.  Based on the pictures, in this case the answer should have been:

 

Link 0 - FMC1.SFP0 to FMC1.SFP1

Link 1 - FMC2.SFP0 to FMC2.SFP3  <- This does not match the IBERT configuration, FMC2.SFP3 should be FMC2.SFP1

Link 2 - Not connected

Link 3 - Not connected

 

Your system images shows that you have a TX FAULT indicator on every SFP and this was part of your other thread.  You never responded to any of my questions in post #29 in that thread nor my re-request in post #34.  In post #29 I had said the following:

 

> Please provide a photo of your test setup that shows the VC707, the FMC card, the SFP and optical cabling.

..

..

>> Why TX_Fault is High?(SFP)

>The most likely condition is that the SFP module is not present.  The second most likely condition is that the SFP >module has detected a fault in the TX laser circuits.This may be due to TX_DISABLE being asserted,

 

In the pictures you provided now, it is clear that you have not installed jumpers on the JP12 TX0:3_DIS pins.  The INF-8074 document that you have posted says in Table 1 "TX Disable, Transmitter Disable, Note 2 Module disables on high or open".  The schematics that you have posted shows that the "TX Disable" pin for each SFP module is open unless the jumper is installed to connect the pin to ground.  This results in the SFP transmitter being disabled.

 

Installing these jumpers should move you on to the next step.  When you encounter the next issue please read and respond fully to every question that is asked.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
rajuponnaganti
Voyager
Voyager
7,654 Views
Registered: ‎03-12-2015

Now I am using FMC1 only.Results are in attched zip file.What is None mode? Is it loopback mode?

I selected different modes as in images. I got unexpected results.Can u explain? for IBERT, it is giving some result.Coming aurora, it is not working.what could be the reason? in simulation it is working.coming to hardware, not working.

I added jumpers as you said.

i added SFP module.

0 Kudos
venkata
Moderator
Moderator
5,480 Views
Registered: ‎02-16-2010

when you set loopback as "None", it means there is no loopback set in GT. Please refer to loopback section in GT user guide for different loopback modes.

I find the BER is very bad with the IBERT result. With erroneous link, IP cannot link up.
------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
0 Kudos
rajuponnaganti
Voyager
Voyager
5,471 Views
Registered: ‎03-12-2015

"IP cannot link up".Here IP means Aurora?

How can we achieve good BER?

What could be the problem?

How can we resilve it?

 

0 Kudos
rajuponnaganti
Voyager
Voyager
5,463 Views
Registered: ‎03-12-2015

I tried one test-loopback between onboard SFP (X1Y2)to SFP on FMC1 daughter card (X1Y24).You can find test setup and chipscope results on zip file. Lane up signal for X1Y2 is toggling and pll_lock signal for X1Y24 is toggloing. Ref clock is 125 MHz, INIT_CLK is SYS_CLK,Board :vc707,aurora 64b66b,streaming.What could be the reason?How can we resolve it?

0 Kudos
mik3l3_hdl
Participant
Participant
1,226 Views
Registered: ‎08-15-2019

Hi guys,

 

I am try to run a similar test with an FMC with 4 SFP+  , card name FM-S14. 

In this test I am implementing a loopback test on the first SFP on which i plugged a loopback bridge (MOLEX).

The design works fine only in Behavioral simulation but  not in Post-Synthesis neither on the real FPGA.

I am providing  to the FM-S14 the signals necessary to activate the laser as follow:

rate_sel1 <= '1'; -- Channel 0 have SFP module run at full bandwidth

tx_disable1 <= '0'; -- Channel 0 enable SFP modules

 

BUT anyway the channel, the lane and the aurora core itself (signal s_axis_tx_ready)  are always down to zero.

 

They are only up with during behavioral . 

 

When I flash the bitstream on  the FM-S14 card, only the led od channel 1 is blinking red the others are turned of.

Weird also because I am trying to drive channel 0 and not channel 1.

 

I have tested all the 4 channels but the situation is the same.

 

I have tried various FS card  but i got always the same situation.

 

Anyone of you has any suggestions please?

 

Thanks a lot

0 Kudos
rajuponnaganti
Voyager
Voyager
1,177 Views
Registered: ‎03-12-2015

Hi ,

i Sha project which is used to generate bitstream.

Which protocol is used ?

0 Kudos
mik3l3_hdl
Participant
Participant
1,149 Views
Registered: ‎08-15-2019

Hi,

 

Protocol used is Aurora64b66b

on Ultrascale+ vcu118 xcvup9 ,  with Vivado 2018.2 HLS.

 

Thanks

Mike

0 Kudos