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Visitor
Visitor
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Registered: ‎06-20-2019

Ultrascale plus IBIS-AMI Simulation

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Hi Team,

I am using ultrascale plus SoCs, I simulating PCIe gen3 using IBIS-AMI files and corresponding S-parameter files of die termination and package.

Simulated same traces with GTH and GTY IBIS-AMI models and I found that, the simulation which used GTY models passing and GTH failing.

Both cases stackup and trace were same, only difference was IBIS-AMI and S-parameter models of Package and die termination.

 

 

 

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-30-2016

Re: Ultrascale plus IBIS-AMI Simulation

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Hello @mufeed029 

Do you have any updates on this post ? Did you find any solution ?
If you find @jhua 's  answer is useful, could you please kindly marked this thread as Solved , so other users can learn from your experience ?

Thanks & regards
Leo

View solution in original post

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-01-2017

Re: Ultrascale plus IBIS-AMI Simulation

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Hi @mufeed029 

Can you share the testbenches of your GTH and GTY runs?

Are you setting the AMI paramters per each of their own User Guides as included in the model package?

We would expect the GTH and GTY to both work at your 8 Gbps line rate. Let's take a look at your setups to see if there is anything not configured correctly.

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Highlighted
Xilinx Employee
Xilinx Employee
155 Views
Registered: ‎03-30-2016

Re: Ultrascale plus IBIS-AMI Simulation

Jump to solution

Hello @mufeed029 

Do you have any updates on this post ? Did you find any solution ?
If you find @jhua 's  answer is useful, could you please kindly marked this thread as Solved , so other users can learn from your experience ?

Thanks & regards
Leo

View solution in original post

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