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ndnsoulja
Participant
Participant
638 Views
Registered: ‎10-24-2018

Vcu118 have any example?

Hi I have a vcu118 that I’m planning to use for my design. I have an SBC connected via PCIe. I plan to use the DMA for PCIe IP core to between the SBC and the vcu118. The data from dma registers need to be transmitted to other FPGAs that are connected via rocket io ( is aurora 64b the same thing?) 

is there any example that’s provided for something similar for this board? Or would this be doable without any vhdl code to route the data directly from dma to rocketio? Like using Axi interconnect to connect the IPs together? 

Pardon my ignorance I’m new to the FPGA to FPGA data transfers. 

 

 

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borisq
Xilinx Employee
Xilinx Employee
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Registered: ‎08-07-2007

hi @ndnsoulja 

 

what does SBC stand for? is it based on x86 CPU?

 

we have XDMA IP based on PCIe and Serdes.

you can connected the XDMA IP to a DDR memory controller, so that you can transfer data from PC to FPGA card or vice verse. No need to do HDL. axi interconnect will handle the connections between XDMAs and DDR controllers. 

 

Below is an example that I created for VCU118.

 

Thanks,

Boris

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vcu118.png
ndnsoulja
Participant
Participant
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Registered: ‎10-24-2018

which ip is the xdma for serdes?
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borisq
Xilinx Employee
Xilinx Employee
538 Views
Registered: ‎08-07-2007

hi @ndnsoulja 

 

the ip name is 'XDMA'.

It can be found in either IP calalog or block design. Serdes or GT is a part of the IP. 

 

here is the document.

https://www.xilinx.com/support/documentation/ip_documentation/xdma/v4_1/pg195-pcie-dma.pdf

 

Thanks,

Boris

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ndnsoulja
Participant
Participant
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Registered: ‎10-24-2018

hi @borisq 

SBC is single board computer. I'll be using the PCIe interface to do DMA transfers from the Single board computer to my VCU118 board. I'm trying to implement something like the screenshot attached. 

THis is what i've tried so far:

1. Setup XDMA for stream for my board.

2. Converted the Aurora Example as IP package so I can add it as a block to my block design. Should i use the example desgin or just use the IP? I decided to use the example desgin since it takes care of the clocks and reset. Is this the best way to go about it? I had to edit the example design so i could use the AXI interface for the DMA data. See the attached errors I'm getting. Could you help with those?

Also, if you have a better suggestion than what i'm doing I'd really appreciate it!

OverviewOverviewXDMA with Rocket IO exampleXDMA with Rocket IO exampleErrorsErrors

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