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Observer
Observer
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Registered: ‎11-21-2019

[ZC706] Cannot set LOC property of ports, Site location is not valid - unable to locate UART TX/RX pins

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Hi,

I am using Zynq ZC706 board. I have used the following xdc constraints for UART TX/RX pins

set_property PACKAGE_PIN D18 [get_ports uart_rx]
set_property IOSTANDARD LVCMOS18 [get_ports uart_rx]

set_property PACKAGE_PIN C19 [get_ports uart_tx]
set_property IOSTANDARD LVCMOS18 [get_ports uart_tx]

Duration Elaboration stage, I dont see any issues in finding the pin locations D18 and C19. When I run through Implementation i see the following error:

[Vivado 12-1411] Cannot set LOC property of ports, Site location is not valid [uartloopback.xdc:24]

 

I am unable to work around this issue. Any suggestions

Thanks

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Xilinx Employee
Xilinx Employee
406 Views
Registered: ‎10-19-2011

Hi @omar.sheriff ,

yes, C19 and D18 are not accessible from PL where you want to put your UART.
You will need to use GPIOs from fabric and you will have to check what connectivity of the board you can use for it.

If you have a UART in your own HDL already, why do you want to use the IP from catalogue then? That would not be necessary then. You just need to connect your UART to PL IOs.

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Moderator
Moderator
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Registered: ‎07-30-2007

You cannot normally loc GT pins.  The IOSTANDARD is fixed and can never be changed as well.  It isn't LVCMOS.   The location is set by the loc of the GT_CHANNEL which is normally set by the GT wizard  or whatever protocol wizard is used and nothing normally needs to be done in the constraints file.




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Observer
Observer
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Registered: ‎11-21-2019

Sorry I am new to this but I am unable to understand your statement. I am not using UART from IP catalog, I am using my own UART IP and trying to connect the tx and rx pins to the USB to UART bridge. Hence the use of these constraints. Otherwise, how does my constraint need to be defined then ?

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-19-2011

Hi @omar.sheriff ,

first, this board is more for high speed transceivers, which the UART definitely not is.

But to answer your question, the USB-to-UART bridge of the ZC706 is connected to dedicated pins of the PS. There is no way to add your own IP to it. You have to use the UART coming with the PS.

Also, as the pins are dedicated for the PS, you cannot set location or IO standard through constraints.

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Observer
Observer
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Registered: ‎11-21-2019

Hi @eschidl ,

Understood, is there a way I can use the UART from IP catalog without using the AXI interface since I dont currently support it ? 

How do I define my pins for UART TX/RX at top level to correctly route them to dedicated UART TX/RX pin locations ?

 

Thanks 

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Xilinx Employee
Xilinx Employee
466 Views
Registered: ‎10-19-2011

Hi @omar.sheriff ,

we provide the UART IP with AXI and there is no option to change that in the GUI. So with using the IP you would need to stick to AXI. You could translate the AXI commands to a different protocol if you want.
On the otherhand I see that you can access the HDL code of the IP. So it would be up to you if you want to change it. But that would be your design then.

If you are talking about the dedicated UART pins we looked at before, you cannot connect anything from the PL to these pins. They are dedicated to the PS UART. Or are you talking about PL IOs?

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Observer
Observer
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Registered: ‎11-21-2019

Hi @eschidl ,

I am trying to validate my ASIC logic on FPGA board. I am using a UART which is part of my ASIC to communicate internally with it. So you are telling me that I cannot connect my UART TX/RX pins to the ones mentioned in the UG954 IO pins C19 and D18 ? And I should use the dedicated UART AXI IP provided ? I do not intend to use Xilinx SDK for this.

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Xilinx Employee
Xilinx Employee
407 Views
Registered: ‎10-19-2011

Hi @omar.sheriff ,

yes, C19 and D18 are not accessible from PL where you want to put your UART.
You will need to use GPIOs from fabric and you will have to check what connectivity of the board you can use for it.

If you have a UART in your own HDL already, why do you want to use the IP from catalogue then? That would not be necessary then. You just need to connect your UART to PL IOs.

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