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Visitor ydelican123
Visitor
279 Views
Registered: ‎10-04-2019

gtp transceiver SPARTAN 6

Can we connect two FPGAs using MGTTXN0_123(TX-),MGTTXP0_123(TX+) pins of FPGA1 and MGTRXN0_123(RX-),MGTRXP0_123(RX+) pins of FPGA2 without using MGTREFCLK0N_123 and MGTREFCLK0P_123 pins. I am using Spartan 6 FPGA, XC6SLX150T.

 

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5 Replies
Explorer
Explorer
246 Views
Registered: ‎03-16-2019

Re: gtp transceiver SPARTAN 6

Could you clarify your question

What is your data rate?

Do you want to run GT without any clock? Or you dont want to use specific pin as a clock source?

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Visitor ydelican123
Visitor
237 Views
Registered: ‎10-04-2019

Re: gtp transceiver SPARTAN 6

I have not decided about data rate. I want to test these signals now (interconnection test). But I am not sure how to test these signals.

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Explorer
Explorer
206 Views
Registered: ‎03-16-2019

Re: gtp transceiver SPARTAN 6

Have you seen locked signal of clock? (Cpll or qpll)

What data do you send on the link?

Could you recieve or monitor data with ila?(chipscope)

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Adventurer
Adventurer
143 Views
Registered: ‎08-01-2017

Re: gtp transceiver SPARTAN 6

Hi

You can't run GT core without any Refclk given. To establish a communication between two boards you need to setup the GTPs and then be careful about the data encoding to lock the plls. 

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Scholar watari
Scholar
135 Views
Registered: ‎06-16-2013

Re: gtp transceiver SPARTAN 6

Hi @ydelican123 

 

If you imprement CDR function, you don't need any external differential clock signals.

 

Best regards,

 

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