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Visitor torresuarez
Visitor
241 Views
Registered: ‎05-02-2019

how to connect Single-ended I/O with GTH

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hi,

I'm using ZU4EG SFCV784 pkg.

I'm planning to use 1GE phy, and going to connect to GTH port.

(I know I don't need to use GTH.. anyway)

Design structure is RJ45 <-> T/F <-> PHY <-> GTH and PS MIO BANK.

So i should connect single-ended TX 4 port and RX 4 port to GTH, but i don't know how to configure it.

First of all, I connected MGTHRXPO, P1, P2, P3 to RX 4 port of PHY, and MGTHTXP0, P1, P2, P3 to TX 4 port of PHY.

And I connected MGTAVTTRCAL_R to VCCO_HP and MGTRREEF_R connected to VCCO_HP with serial resistor.

The other control signals of PHY are connected to PS MIO.

My questionare is as below.

1. Is there anything wrong with the foregoing?

2. In case single-ended I/O connect to GTH, how should I handle of N0, N1, N2, N3 of TX, RX?

Thank you.

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1 Solution

Accepted Solutions
Scholar drjohnsmith
Scholar
157 Views
Registered: ‎07-09-2009

Re: how to connect Single-ended I/O with GTH

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Whats the PHY chip ?

RGMII is 4 data lines double data rate , which uses the standard IO of the FPGA ( all be it the fast ones ), not the GTx.

this might help

https://ethernetfmc.com/rgmii-interface-timing-considerations/

https://en.wikipedia.org/wiki/Media-independent_interface#Gigabit_media-independent_interface
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6 Replies
Xilinx Employee
Xilinx Employee
203 Views
Registered: ‎10-19-2011

Re: how to connect Single-ended I/O with GTH

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Hi @torresuarez ,

GTH inputs/outputs are differential and you should use them this way. The RJ45 connector has differential signals too, I would say. Where do you find single-ended signals here? Do they come from your PHY? What are you using there?

To use the transceivers you need to provide them with their own supplies. You should not connect to other IO supplies like VCCO. Please refer to the Board Design Guidelines in UG576.

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Scholar u4223374
Scholar
196 Views
Registered: ‎04-26-2015

Re: how to connect Single-ended I/O with GTH

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@torresuarez The GTH (and all of the GT* transceivers) cannot operate in single-ended mode. Unlike the general-purpose SelectIO pins, the transceivers support exactly one I/O standard, which is a CML differential signalling system. If your PHY requires single-ended signals, route those to SelectIO pins instead.

Scholar drjohnsmith
Scholar
194 Views
Registered: ‎07-09-2009

Re: how to connect Single-ended I/O with GTH

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Is this a PHY not in the FPGA ?

Which PHY is it ?

Most ( ALL ) the phys I know use an interface to the FPGA thats differential, such as the SGMII ,

 

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Visitor torresuarez
Visitor
176 Views
Registered: ‎05-02-2019

Re: how to connect Single-ended I/O with GTH

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@drjohnsmith @u4223374 @eschidl 

Thank you for your reply.

 

I use PHY of RGMII interface, so TX, RX are not differential.

So I connected TX 4bit to TXP0~TXP3 of GTH Bank, and RX 4bit to RXP0~RXP3 of GTH Bank.

But GTH port should only use differential signal, is it impossible to connect to TX, RX to GTH port?

Thank you.

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Scholar drjohnsmith
Scholar
158 Views
Registered: ‎07-09-2009

Re: how to connect Single-ended I/O with GTH

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Whats the PHY chip ?

RGMII is 4 data lines double data rate , which uses the standard IO of the FPGA ( all be it the fast ones ), not the GTx.

this might help

https://ethernetfmc.com/rgmii-interface-timing-considerations/

https://en.wikipedia.org/wiki/Media-independent_interface#Gigabit_media-independent_interface
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Scholar u4223374
Scholar
139 Views
Registered: ‎04-26-2015

Re: how to connect Single-ended I/O with GTH

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@torresuarez No, the GTH cannot drive these lines in single-ended mode. It can't meet the speed requirements either - the minimum speed for a GTH is 500Mbps and RGMII needs to operate right down to 2.5Mbps.

 

Quite apart from that, all the high-speed transceivers are pretty power-hungry - best not to use them unless you need that performance.