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Adventurer
Adventurer
556 Views
Registered: ‎05-25-2016

multiple GTH run simultaneously failed

My board has two xc7v690t, the FPGA A is conneted to six ADCs via JESD204, each ADC using four GTH lanes.

The two FPGAs are connected using 16 GTH lanes.

The FPGA A could run JESD204 or 16 GTH lanes independently, while these two function block were adding into the FPGA simultaneously, the 16 GTH lanes run failed.

How to solve this problem?

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3 Replies
Adventurer
Adventurer
512 Views
Registered: ‎05-25-2016

Re: multiple GTH run simultaneously failed

The ADC run well, while the 16 GTH lanes TXOUTCLK have no outputs.
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Xilinx Employee
Xilinx Employee
468 Views
Registered: ‎11-29-2007

Re: multiple GTH run simultaneously failed

hello,

there might be many reason for this (PCB issue, power supply, REFCLK, wrong clock tree, reset issue ... ). Have you tried with IBERT? In this way we will debug the REFCLK, the power and the layout with one test.

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Adventurer
Adventurer
464 Views
Registered: ‎05-25-2016

Re: multiple GTH run simultaneously failed

Clock tree may be the reason. Can you give me some advice on clock tree.
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