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v7-690t gth bufg resources can not fit the device

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Visitor
Posts: 9
Registered: ‎06-08-2018

v7-690t gth bufg resources can not fit the device

recently I have a project,use 40 GTHs,and the 690t suporrts 80 GTHs. Below is my parameters setting.

RX:line rate 6.25G;

coding:8b/10b;

internal data with:32bits;

PLL seletion:Quad PLL;

gth count:32 gths.

 

TX:line rate 5.0G;

coding:8b/10b;

internal data with:32bits;

PLL seletion:Quad PLL;

gth count:40 gths.

But when I instanced the GTH IP core and implement the project,the bufg resource can not meet the device, and the MAP ERROR : TOO MANY COMPS OF TYPE "BUFG" TO FOUND TO FIT THIS DEVICE.

Design summary says the project uses 46 bufgs,but the device only has 32 bufgs.

And I check the gt_rxusrclk_source.v ,I found that RX IP core uses 33 bufgs and the TX IP core uses 11 bufgs.

So I have a question, 7 series family says 690T has 80 GTHs, I want to know how do I correctly use the GTH IP core and make the bufg resource meet my project ? 

I was very impatient to the way to solve this question,and it is important for me to know why .

thank you very much.

Xilinx Employee
Posts: 267
Registered: ‎11-29-2007

Re: v7-690t gth bufg resources can not fit the device

hello

you might check if you can share one BUFG among multiple resources.

for example if you have 10 transmitters, all transmitting at the same rate and using the same reference clock, it is possible to use  TXOUTCLK(one master) -> BUFG -> TXUSRCLK (all TX). In this way you save 9 BUFG.

If you use clock correction, you might use the same BUFG also for receiver side: TXOUTCLK (master) -> BUFG -> TXUSRCLK and RXUSRCLK

 

Clock correction is very common with 8B10B coding. I hope you will find this option useful

Visitor
Posts: 9
Registered: ‎06-08-2018

Re: v7-690t gth bufg resources can not fit the device

Hi,@ gguasti,
If the remote TX run at the same rate 5Gbps , but use the different REFCLK, the RX (line rate is 5Gbps)can use one BUFG to drive 4 rxusrclk in one Quad.
Just like:
BUFG rxoutclk_bufg0_i
(
.I (gt0_rxoutclk_i),
.O (gt0_rxusrclk_i)
);

gt0_rxusrclk_i can drive the gt0_rxusrclk_i~gt3_rxusrclk_i .

Can this way work ok?
Xilinx Employee
Posts: 267
Registered: ‎11-29-2007

Re: v7-690t gth bufg resources can not fit the device

hello,

you can use RXOUTCLK (recovered clock) to drive the RXUSRCLK.

Because you have four lanes, but you are referring to the recovered clock from lane 0, you must be sure that all far end transmitters 0, 1, 2, 3 are synchronous. I mean that they should all be sourced by one oscillator.

 

If this is not true, and for example you have 4 independent transmitters, all of them at 5Gbps, but sourced by four different oscillators, you can still use this clock tree, however you need clock correction on lanes 1, 2, 3

 

if your transmitter is also 5Gbps, and the data width is the same (that is, the TXUSRCLK2 and RXUSRCLK2 frequency are the same), you might also use this configuration: TXOUTCLK->BUFG->multiple RXUSRCLK2 and TXUSRCLK2. Clock correction is needed here.

 

whenever you share the BUFG, considerations should be done on resets. For example, if you reset the master (lane 0) all other lanes will be affected.