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Observer yuhui
Observer
19,937 Views
Registered: ‎06-03-2010

Boundary Scan loading to SPI Flash failed.

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Hi all, I'm trying to load the .mcs file into a 3rd party SPI FLASH PROMs(M25P128) using the Xilinx Platform Cable USB II. The problem is, I was able to load the .bit file into FPGA but I can't load .mcs file into SPI FLASH. there is always error message:

 

Configuration data download to FPGA was not successful. DONE did not go high, please check your configuration setup and mode settings.

 Here is the impact log file, could you please help me to solve this? Thanks a lot.

 

GUI --- Auto connect to cable...
AutoDetecting cable. Please wait.
PROGRESS_START - Starting Operation.
Connecting to cable (Usb Port - USB21).
Checking cable driver.
 Driver file xusb_xp2.sys found.
 Driver version: src=2301, dest=2301.
 Driver windrvr6.sys version = 8.1.1.0. WinDriver v8.11 Jungo (c) 1997 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811.
 Cable PID = 0008.
 Max current requested during enumeration is 300 mA.
Type = 0x0005.
 Cable Type = 3, Revision = 0.
 Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 2401.
File version of C:/Xilinx/12.1/ISE_DS/ISE/data/xusb_xp2.hex = 2401.
Firmware hex file version = 2401.
PLD file version = 200Dh.
 PLD version = 200Dh.
PROGRESS_END - End Operation.
Elapsed time =      1 sec.
Type = 0x0005.
ESN option: 000013E23E3A01.
Attempting to identify devices in the boundary-scan chain configuration...
INFO:iMPACT - Current time: lun. 30. août 18:59:08 2010
PROGRESS_START - Starting Operation.
Identifying chain contents...'0': : Manufacturer's ID = Xilinx xc6slx16, Version : 3
INFO:iMPACT:1777 - 
Reading C:/Xilinx/12.1/ISE_DS/ISE/spartan6/data/xc6slx16.bsd...
INFO:iMPACT:501 - '1': Added Device xc6slx16 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
done.
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
'1': Loading file 'D:/Xilinx_Project/startkit/starterkit.bit' ...
done.
INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory,
but the original bitstream file remains unchanged.
UserID read from the bitstream file = 0xFFFFFFFF.
Data width read from the bitstream file = 1.
INFO:iMPACT:501 - '1': Added Device xc6slx16 successfully.
----------------------------------------------------------------------
----------------------------------------------------------------------
Selected part: M25P128
Unprotect sectors: FALSE
INFO:iMPACT - Current time: lun. 30. août 19:00:35 2010
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 33000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': Programming device...
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
'1': Reading status register contents...
[0] CRC ERROR                                                              :         0
[1] IDCODE ERROR                                                           :         0
[2] DCM LOCK STATUS                                                        :         1
[3] GTS_CFG_B STATUS                                                       :         1
[4] GWE STATUS                                                             :         1
[5] GHIGH STATUS                                                           :         1
[6] DECRYPTION ERROR                                                       :         0
[7] DECRYPTOR ENABLE                                                       :         0
[8] HSWAPEN PIN                                                            :         1
[9] MODE PIN M[0]                                                          :         1
[10] MODE PIN M[1]                                                         :         1
[11] RESERVED                                                              :         0
[12] INIT_B PIN                                                            :         1
[13] DONE PIN                                                              :         1
[14] SUSPEND STATUS                                                        :         0
[15] FALLBACK STATUS                                                       :         0
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1100 1110 1100 
INFO:iMPACT:579 - '1': Completed downloading bit file to device.
INFO:iMPACT:188 - '1': Programming completed successfully.
 LCK_cycle = NoWait.
LCK cycle: NoWait
INFO:iMPACT - '1': Checking done pin....done.
'1': Programmed successfully.
PROGRESS_END - End Operation.
Elapsed time =      1 sec.
INFO:iMPACT - Current time: lun. 30. août 19:01:04 2010
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 33000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations.
INFO:iMPACT - Downloading core file C:/Xilinx/12.1/ISE_DS/ISE/spartan6/data/xc6slx16_spi.cor.
'1': Downloading core...
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
'1': Reading status register contents...
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1100 1110 1100 
INFO:iMPACT:2492 - '1': Completed downloading core to device.
'1': IDCODE is '202018' (in hex).
'1': ID Check passed.
 '1': IDCODE is '202018' (in hex).
'1': ID Check passed.
 '1': Erasing Device.
'1': Using Sector Erase.
'1': Programming Flash.
'1': Reading device contents...
done.
'1': Verification completed.
'1':Programming in x1 mode.
'1': Configuration data download to FPGA was not successful. DONE did not go high, please check your configuration setup and mode settings.
INFO:iMPACT - '1': Flash was not programmed successfully.
PROGRESS_END - End Operation.
Elapsed time =    153 sec.

 

 

 

boundary_scan.PNG
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Observer yuhui
Observer
23,106 Views
Registered: ‎06-03-2010

Re: Boundary Scan loading to SPI Flash failed.

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I've solved the problem.

In my design, the M1 is connected with a 1K resistor and a Diode to GND. As the diode is forward biased with a low current, the voltage should be low, but not low enough. I did a short-cut on Diode and directly connected the 1K to GND and it worked out.

Thnks Gabor for your advice.

View solution in original post

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7 Replies
Instructor
Instructor
19,927 Views
Registered: ‎08-14-2007

Re: Boundary Scan loading to SPI Flash failed.

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It looks like you need to check your mode pin settings.  I think M1 should

be low for SPI flash configuration.  The M0 and M1 pins are both high in

the status register.  After the flash device is programmed, the default

action is to configure the FPGA from the flash device, but this requires

the mode pins to be set properly for SPI flash configuration.  If you have

a resistor tying M1 to ground, make sure it is small enough to overcome

the internal pullup of the Spartan 6.  Less than 1K should do it.

 

HTH,

Gabor

-- Gabor
Instructor
Instructor
19,926 Views
Registered: ‎08-14-2007

Re: Boundary Scan loading to SPI Flash failed.

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Just another note.  It appears the the flash itself was programmed properly and verified.

So whatever causes your "programming failure" is related to booting the FPGA from

the flash.  You could see if power cycling the board boots the FPGA.

 

regards,

Gabor

-- Gabor
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Observer yuhui
Observer
19,902 Views
Registered: ‎06-03-2010

Re: Boundary Scan loading to SPI Flash failed.

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The M1 is connected with a 1K resistor to GND, and M0 is connected with a 10K resistor to 3.3V.
Yes I think the flash was programmed but the Configuration data download to FPGA was not successful, the Mode pin M1 is always high. Could you please tell me how to power cycle the board? Thanks again.

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Xilinx Employee
Xilinx Employee
19,888 Views
Registered: ‎01-03-2008

Re: Boundary Scan loading to SPI Flash failed.

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"Power cycle" means to turn the power off and then back on again.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
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Highlighted
Observer yuhui
Observer
23,107 Views
Registered: ‎06-03-2010

Re: Boundary Scan loading to SPI Flash failed.

Jump to solution

I've solved the problem.

In my design, the M1 is connected with a 1K resistor and a Diode to GND. As the diode is forward biased with a low current, the voltage should be low, but not low enough. I did a short-cut on Diode and directly connected the 1K to GND and it worked out.

Thnks Gabor for your advice.

View solution in original post

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17,664 Views
Registered: ‎10-20-2011

Re: Boundary Scan loading to SPI Flash failed.

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@gszakacs wrote:

Just another note.  It appears the the flash itself was programmed properly and verified.

So whatever causes your "programming failure" is related to booting the FPGA from

the flash.  You could see if power cycling the board boots the FPGA.

 

regards,

Gabor



 i have the same problem and use your method,i solve it. thanks a lot.

 

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Visitor rphillips
Visitor
16,273 Views
Registered: ‎02-06-2012

Re: Boundary Scan loading to SPI Flash failed.

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I had a similar problem with programing a flash working, but the done bit failing to go high. My board designer used a 4.7k resistor on M1 to round, i added a 1.5k to test this and the done bit now goes high.

 

Thanks everyone,

 

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