06-18-2009 01:20 PM
i am looking at various options to configure a Spartan3E(XC3S500E) part. This device would connect to a PC via Cypress(FX2) USB controller and would boot off a SPI flash(M25P40 Boot Prom). Initially,I would like to program the bitstream directly to the FPGA using its JTAG pins. Ideally this would be accomplished by using the FX2 to bit-bang the FPGA JTAG pins . Once,the default configuration is loaded in to the FPGA, the FPGA can program the Boot Prom over SPI and can re-configure itself every time from the boot-prom. Can anybody give me pointers on how to go about this as my knowledge of JTAG is very limited.Thanks in advance.
06-18-2009 08:13 PM
I have used an FX2 to program Xilinx parts several times in the past
and have been very pleased with the results. One design used the
Slave Parallel mode to load 8 bits at a time (very fast), another used
the JTAG port and FX2 firmware to bit-bang the data.
In both cases, we used custom firmware along with our custom FX2 driver. It
was NOT a trivial task. You can find a lot of pieces on the web, but I don't think
you'll find a complete solution. There's lots of documentation on the web about
JTAG programming. I believe Xilinx also has C code in one of their app-notes
about processing XSVF files to extract the low level bit stream.
I hope this helps.
06-19-2009 11:22 AM
thank you much for sharing your experience with me. i am trying to reverse engineer a platform that has a FX2 whose port D pins(52,53,54,55 and 56) are connected to the JTAG port pins of the Spartan XC3S500E(PQ208). I am not sure if the FX2 uses the GPIF interface bus to bit bang JTAG. The custom firmware lets you stream the FPGA bitstream file directly. All other solutions that I have looked at use a SVF/XSVF player or a parser to decode the underlying bit pattern from a .XSVF file before streaming it to the FPGA. I thought this was interesting.In your implementations, did you parse a XSVF file or did you manage to stream the .BIT file to the FPGA directly?
06-21-2009 04:57 PM
In one design, we used the GPIF and Bulk transfers with the Slave Parallel mode to load
8 bits at a time - very fast.
In another design, we used firmware to bit bang the JTAG i/f.
11-18-2011 07:29 AM
Sorry for replying to an ancient thread, but I thought I'd post a link to FPGALink here because it may be of interest to others who stumble upon this thread.
FPGALink is an open-source cross-platform library that communicates with an FX2 chip over USB, allowing you to JTAG-program an FPGA, then read and write your FPGA design's registers/FIFOs at ~25MiB/s with an easy-to-use host-side API.
It supports many of the Digilent FPGA boards natively, but there's also an FX2 reference design if you want to make your own PCB.
11-26-2011 12:10 AM
Thanks for the links to Your site. I became aware of Your work with the FX2-> FPGA when searching for relevant information. This gives me more inspiration to work on implementing cross platform host applciations based on FX2-> FPGA interfaces.
05-19-2012 11:28 AM
Does any one willing to share his experience of programing an FPGA with the FX2 using the GPIF.
I am also intrested in progamming a W25Q with the FX2.