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cuizehan
Observer
Observer
19,842 Views
Registered: ‎08-22-2010

XCF128X - Verify failed

I'm doing project using xc6vlx130t FPGA and xcf128x Platform Flash.

 

The software I've tried are ISE design suite 12.1 and 12.2.

 

The FPGA configuration method is Slave SelectMAP, the Flash program method is Indirect In-system programming.

 

I've succeeded in configure the FPGA directly using the JTAG port, now I'm migrating to using the no-volatile Flash.

 

But I failed to program the xcf128x using iMPACT.

 

I followed the UG438 and failed in the last step - Program the flash.

 

Here is the error messages:

--------------------------------------

'1': Erasing device...
'1': Start address = 0x00000000, End address = 0x0053638B.
done.
'1': Erasure completed successfully.
Setting Flash Control Pins ...
Using x16 mode ...
Setting Flash Control Pins ...
Setting Configuration Register ...
INFO:iMPACT - Using Word Programming.
'1': Programming Flash.
done.

Setting Flash Control Pins ...
'1': Flash Programming completed successfully.
Using x16 mode ...
Setting Flash Control Pins ...
Setting Configuration Register ...
'1': Reading device contents...
Failed at address, 0.
'1': Verification Terminated.
Setting Flash Control Pins ...
INFO:iMPACT - '1': Flash was not programed successfully.
PROGRESS_END - End Operation.
Elapsed time =    307 sec.

--------------------------------------

 

It seems that I failed in the Verify step, but I can't find out why.

 

I ran the iMPACT processes respectively, the Erase and Blank Check can pass successfully, Readback got a wrong file, Checksum failed too.

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10 Replies
cuizehan
Observer
Observer
19,812 Views
Registered: ‎08-22-2010

anybody please help me ?

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cuizehan
Observer
Observer
19,811 Views
Registered: ‎08-22-2010

'1': Reading device contents...
Failed at address, 0.

'1': Verification Terminated.

 

I've searched this problem in the webcast and found this.

 

http://www.xilinx.com/support/answers/22636.htm

http://www.xilinx.com/support/answers/22991.htm

http://www.xilinx.com/support/answers/24789.htm

 

 

 

all the reply from xilinx is that it's the software problem, update to a later version can solve the problem.

 

however, i have tried in ISE12.1 and ISE12.2, which is the latest.  what can i do now?

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gregmeredith
Xilinx Employee
Xilinx Employee
19,794 Views
Registered: ‎07-30-2007

It would be good to run a couple diagnostic test here.  Run a readback after the programing and see what the data is set to.  The readback will take a while and will run the size of the .mcs file.  The .mcs file can be manually truncated to cut down on the readback file size and readback times.

 

It would be good to see if any data is getting into the flash.

 

It would also be good to double check the board connections and specifically the INIT pin to READY_WAIT to make sure it is rising fast enought. 

 

The CFI querry is working so data is comming out, it would just be good to see what the data looks like after the programing attempt.

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cuizehan
Observer
Observer
19,784 Views
Registered: ‎08-22-2010

thanks, gregmeredith.

 

I have tried readback to file, and the file readback is different from the orignal file I program to the flash.

 

the orignal file is 14MB, but the readback file is 46MB.

 

but when programming the flash, i can see the address changing, i think the data has been writen into the flash.

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johnnyn
Xilinx Employee
Xilinx Employee
19,564 Views
Registered: ‎07-20-2009

Have you compared the contents of the readback file vs. the PROM file? Portions of the readback file with all Fs are where the PROM was erased.

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borisq
Xilinx Employee
Xilinx Employee
19,431 Views
Registered: ‎08-07-2007

also you can try erase and blankcheck

see if erasing can work.

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dbarrowman
Explorer
Explorer
19,240 Views
Registered: ‎11-27-2008

I had a similar problem. In my case, I had some fairly strong pulldown resistors on the upper two address bits going to the flash. This was part of a mechanism to allow me to manually switch between four revisions in the Platform Flash XL. Anyway, changing these to weaker pulldown resistors allowed the in direct programming to work. Probably some of these pins are driven by the FPGA during in direct programming and it couldn't override the weak pulldowns.

 

Hope that helps,

Dan

 

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iguo
Xilinx Employee
Xilinx Employee
17,761 Views
Registered: ‎08-10-2008

the orignal file is 14MB, but the readback file is 46MB.

This is because readback reads the whole bpi flash contect, not only what you just programmed into the flash.
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sanjayapoudel
Visitor
Visitor
14,543 Views
Registered: ‎02-03-2014

hello everyone, plz anyone can help me here. in my board 10 k resistor used with 3 v  in hold and two 33 ohm  pull up resistor with cs and miso .this can be a prolem for spi programming?? thanks

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smarell
Community Manager
Community Manager
4,532 Views
Registered: ‎07-23-2012

This is an very old post. Please create a new thread asking your query.
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