32 Bit Floating Point Multipler

[biggin1234]

We are working on trying to simulate a 32 Bit Floating Point Multiplier. I am attaching the prompt and our code files. We really need help understanding how to create the test code. The test code that I am attaching will need to be modified to work with my design code. The design code hopefully works, but I may need some help debugging. I keep getting a few errors. I could really use some help. It all needs to be written in VHDL.

Attached: 

1. Prompt

2. My Design Code

3. Test Code Model

[richardhead]

You dont say what the problem is...

NOtes:

1. Your main_control process is missing F1, F2, multout from the sensitivity list.

2. In the Fmult_test.vhd, your stim_proc waits for clk_periods - so it will change just before the clock. You need to synchronise to the clock:

wait until rising_edge(clk);

-- instead of

wait for CLK_period;

[biggin1234]

Thank you for the help with that however the problem is in the prompt. But I have copied it here for your convenience

Below is what I am working on. I need to set up my test bench to simulate this data. It needs to work with my design code. That is the problem. I can't make it work.

c) Write a complete VHDL model for the multiplier (use at least two processes).
d) Simulate for the following test data (using test vector arrays in the testbench):
25.25 x -2.5 = -63.125
0 x 25.25 = ?
-7.5 x -7.5 = ?

[richardhead]

The prompt doesnt have any problems - only an assignment.What problems are you having specifically? "I cannot make it work" is not really a problem we can answer. Why doesnt it work? what do you expect? what is actually happening? have you simulated? does the simulation run? are the inputs what you expected?