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Explorer
Explorer
265 Views
Registered: ‎10-12-2018

AXI VIP: Fatal: A slave must only give a write response after the last write data item is transferred.

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Hi,

I get the following error during simulation.

 

Fatal: [m_axi_agent_monitor]
(axi_vip_pkg.axi_monitor(C_AXI_PROTOCOL=2,C_AXI_ADDR_WIDTH=12,C_AXI_SUPPORTS_NARROW=0,C_AXI_HAS_BURST=0,C_AXI_HAS_LOCK=0,C_AXI_HAS_CACHE=0,C_AXI_HAS_REGION=0,C_AXI_HAS_QOS=0)::b_channel.B_LOOP)
2290.0 ns : AXI_ERRS_BRESP.
A slave must only give a write response after the last write data item is transferred.
Could not find BID=0x00000000 in the incoming write queue.

Time: 2290 ns  Iteration: 0  Process: /axi_vip_pkg/axi_monitor
(C_AXI_PROTOCOL=2,C_AXI_ADDR_WIDTH=12,C_AXI_SUPPORTS_NARROW=0,C_AXI_HAS_BURST=0,C_AXI_HAS_LOCK=0,C_AXI_HAS_CACHE=0,C_AXI_HAS_REGION=0,C_AXI_HAS_QOS=0)::b_channel/B_LOOP
File: /wrk/2017.4/nightly/2017_12_15_2086221/prep/rdi/vivado/data/xilinx_vip/hdl/axi_vip_pkg.sv

$finish called at time : 2290 ns : File "/wrk/2017.4/nightly/2017_12_15_2086221/prep/rdi/vivado/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" Line 145

WARNING: [Simulator 45-29] Cannot open source file /wrk/2017.4/nightly/2017_12_15_2086221/prep/rdi/vivado/data/xilinx_vip/hdl/xil_common_vip_pkg.sv: file does not exist.
INFO: [USF-XSim-96] XSim completed. Design snapshot 'aurora_wrapper_sim_top_behav' loaded.
INFO: [USF-XSim-97] XSim simulation ran for 2875 ns
launch_simulation: Time (s): cpu = 00:00:04 ; elapsed = 00:01:01 . Memory (MB): peak = 1269.652 ; gain = 10.902

I can read AXI registers successfuly, but I get error above at writing a register.

 

Here is a snippet of my code of writing a register:

  task write_reg(
      input xil_axi_ulong data,    // The data to be written
      input xil_axi_ulong addr,     // register address
      input axi_vip_processor_mst_t m_axi_agent,   // Agent of the AXI VIP (bus)
      input string regName = "<unknown>",
      input time timeout = 10us
    );
    
    // declare the transaction
    axi_transaction wr_trans;

    // create the transaction
    wr_trans = m_axi_agent.wr_driver.create_transaction("master agent create write transaction");
    wr_trans.set_axi_version(XIL_VERSION_LITE);
    wr_trans.set_write_cmd(addr);
    wr_trans.set_data_beat(0, data);
    // Send the transaction. This command will drive the AXI interface towards the slave device.
    m_axi_agent.wr_driver.send(wr_trans);
    // Wait for and return response or timeout.
    fork: resp_timeout
      begin
        // The normal operation: Wait response and store it.
        m_axi_agent.wr_driver.wait_rsp(wr_trans);
        //data = wr_trans.get_data_beat(0);
        if (verbosity >= verbosity_dbg)
          $display("[DBG] write_reg(): %s (%h) = %h", regName, addr, data);
      end
      begin
        // If timeout occures write error msg and return
        #timeout;
        error++;
        if (verbosity >= verbosity_err)
          $display("[ERROR] write_reg(): Timeout while writing %s (%h) = %h", regName, addr, data);
      end
    join_any
    disable resp_timeout;
  endtask

I investigate some sources of the VIPs and the error must comes from the following path:

/****************************************************
*xil_common_vip_pkg.sv: (lines140-146)
****************************************************/
  /*
    Function: get_tag
    Gets the name/TAG of the object
  */
  virtual function string get_tag();
    return(this.TAG); 
  endfunction : get_tag

Called by:

/********************************************
* axi_vip_pkg.sv (task b_channel ()) (lines 9102-9110)
*********************************************/
      axi_bresp_port.write(bresp);
      bresp = vif_proxy.get_bresp();
      p_id = bresp.id;
      ///////////////////////////////////////////////////////////////////////////
      //Since this is the RESP, there must be an ID look up for it!
      if (!(incoming_write.exists(p_id))) begin
        `xil_fatal(this.get_tag(),
          $sformatf("AXI_ERRS_BRESP. A slave must only give a write response after the last write data item is transferred. Could not find BID=0x%x in the incoming write queue.", p_id))
      end

It seems me a bug in the VIP cause it tries to find BID which is not available in AXI-Lite as I know, Am I right?

I attached the waveform of the error.

I use:

  • Win10
  • Xilinx Vivado 2017.4
  • AXI VIP 1.1 as master of an AXI-Lite slave DUT

 

 

 

Tags (3)
axi_vip_error_wave.PNG
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1 Solution

Accepted Solutions
Explorer
Explorer
253 Views
Registered: ‎10-12-2018

Re: AXI VIP: Fatal: A slave must only give a write response after the last write data item is transferred.

Jump to solution

Finally I solved.

The problem was that there was no awready on AXI interface at the VIP. (There was some connection problem.)

This is why the VIP thought that the bresp arrived earlier than the awready.

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1 Reply
Explorer
Explorer
254 Views
Registered: ‎10-12-2018

Re: AXI VIP: Fatal: A slave must only give a write response after the last write data item is transferred.

Jump to solution

Finally I solved.

The problem was that there was no awready on AXI interface at the VIP. (There was some connection problem.)

This is why the VIP thought that the bresp arrived earlier than the awready.

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