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Visitor fball
Visitor
9,225 Views
Registered: ‎07-15-2015

Adding Encrypted IP Cores Standalone Modelsim

Hello,

 

I realise this was covered here:

http://forums.xilinx.com/t5/Simulation-and-Verification/modelsim-simulation-of-Vivado-encrypted-IP/td-p/330391

but I still can't get it to work.

 

I have these libraries included:

 

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE ieee.numeric_std.ALL;

USE ieee.std_logic_misc.ALL;

 

LIBRARY unisim;

USE unisim.VComponents.ALL;

 

And this is the block I'm trying to use:

 


dsp
: entity work.dsp_c -- a*b+c, 12bit port map ( clk => clk_i, a => a_dsp, b => b_dsp, c => c_dsp, p => p_dsp -- full precision );

 

I went into vivado in tcl mode and got it to compile, it created a dsp_c folder:

 

dsp_c.dcp   dsp_c_funcsim.vhdl  dsp_c_stub.v     dsp_c.xci  synth   xbip_dsp48_wrapper_v3_0  xbip_utils_v3_0
dsp_c_funcsim.v  dsp_c_ooc.xdc      dsp_c_stub.vhdl  dsp_c.xml  xbip_dsp48_macro_v3_0   xbip_pipe_v3_0

I have a tcl script which looks like this, it fails on mydsp_c.vhd saying:

 

 

source firmware/cfg/lib_mappings.tcl

vlib work
vcom firmware/hdl/mydsp_c.vhd

 

It compains saying it can't find the dsp block, so I added:

 

src dsp_c/dsp_c.vhd

Throws up this error:

 

dsp_c/dsp_c.vhd(56): Library xbip_dsp48_macro_v3_0 not found.

Tried sourcing the libraries:

 

src dsp_c/xbip_dsp48_macro_v3_0/hdl/xbip_dsp48_macro_v3_0_vh_rfs.vhd
src dsp_c/xbip_dsp48_macro_v3_0/hdl/xbip_dsp48_macro_v3_0.vhd

Tells me they are protected:

 

dsp_c/xbip_dsp48_macro_v3_0/hdl/xbip_dsp48_macro_v3_0.vhd(46)): in protected region.

 

That's when I stumbled across that forum post above.

 

I tried the method in the post before whereby you try a vmap, my tcl script now looks like this:

 

 

vlib work
vlib dsp_c/xbip_dsp48_macro_v3_0
vmap dsp_c/xbip_dsp48_macro_v3_0

 

# do mkProject.tcl 
# Modifying modelsim.ini
# ** Warning: (vlib-34) Library already exists at "work".
# ** Warning: (vlib-34) Library already exists at "dsp_c/xbip_dsp48_macro_v3_0".
# Reading modelsim.ini
# "dsp_c/xbip_dsp48_macro_v3_0" maps to directory ./dsp_c/xbip_dsp48_macro_v3_0. (Default mapping)

..........

# -- Loading package NUMERIC_STD
# ** Error: firmware/cgn/dsp_c/dsp_c.vhd(56): Library xbip_dsp48_macro_v3_0 not found.
# ** Error: firmware/cgn/dsp_c/dsp_c.vhd(57): (vcom-1136) Unknown identifier "xbip_dsp48_macro_v3_0".
# ** Error: firmware/cgn/dsp_c/dsp_c.vhd(59): VHDL Compiler exiting
# ** Error: vcom failed.

 

Any ideas? I feel like I am almost there - or can you not launch a standalone version of modelsim (I can launch this project via Vivado but for various reasons I can't do this in the longterm).

 

 

 

 

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6 Replies
Visitor fball
Visitor
9,210 Views
Registered: ‎07-15-2015

Re: Adding Encrypted IP Cores Standalone Modelsim

Also I'm using:

Vivado 2014.4

Questa Sim 10.2c_5

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Moderator
Moderator
9,134 Views
Registered: ‎04-17-2011

Re: Adding Encrypted IP Cores Standalone Modelsim

If you are using Vivado 2014.4 then you should be using Questa 10.3b or above. Use of 10.2c_5 is not supported with Vivado 2014.4. Try the same in the supported version and check. Also, try to invoke Questasim from Vivado to check.
Regards,
Debraj
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Visitor fball
Visitor
9,118 Views
Registered: ‎07-15-2015

Re: Adding Encrypted IP Cores Standalone Modelsim

I can launch questasim from Vivado fine and it will simulate these DSPs but this is not what I want to do. I want to use it standalone but I have a feeling that I can't because of the new encryption of various IP cores.

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Xilinx Employee
Xilinx Employee
9,116 Views
Registered: ‎09-20-2012

Re: Adding Encrypted IP Cores Standalone Modelsim

Hi,

 

You can use launch_simulation -scripts_only command from vivado tcl console.

 

This generates the scripts which can be run in modelsim standalone.

 

Hope this helps.

 

Thanks,

Dee[ola/

Thanks,
Deepika.
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Visitor fball
Visitor
9,084 Views
Registered: ‎07-15-2015

Re: Adding Encrypted IP Cores Standalone Modelsim

I did this and the scripts weren't useful for within my current simulation framework. One of the reaosns being our ethernet IPs are real for the Vivado project and they use dumy ones for our simulation system.

 

One quick question - what is the difference between Vivado launching modelsim and launching a precompiled version of modelsim? My boss told me something about the Vivado launching method is time driven - so it knows what happenes at exactly what time according to the chip. Our method which he says is older, doesn't care about chip time and hence is much faster. 

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Xilinx Employee
Xilinx Employee
8,992 Views
Registered: ‎07-16-2008

Re: Adding Encrypted IP Cores Standalone Modelsim

launch_simulation -scripts_only helps to get you a simulation script which has correct compile list and library association when compiling source files (especially the IP sources).

 

Unlike ISE coregen IPs, the IP generated from Vivado IP Catalog has its simulation models delivered in IP generation. So it's important that all IP sources used for simulation are compiled and compiled to the correct library.

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