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Explorer
Explorer
760 Views
Registered: ‎04-26-2017

Behavioural siimulation match but the post-synthesis implementation no match

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Hi all,

 

I am trying to configure the PCS/PMA IP through the MDIO bus, so I created an IP to configure the mdio. Once I've finish this IP I run the behavioural simulation and it behaves as I wanted. However, when I simulate the Post-synthesis (the functional and the timing) I get different results. I am wondering what is wrong and how can I revert this. Is important that the simulations match between each other?

 

See my code and my outputs simulations ( the debug signals are to know in which state is the FSM)

 

Block design:

bd_schematic.PNG

 

 

Behavioural Simulation

Behavioural_simulation.PNG

 

 

Functional Post-Synthesis Simulation

Functional_post_synthesis.PNG

 

 


Timing Post-Synthesis Simulation
Timing_post_synthesis.PNG

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1 Solution

Accepted Solutions
730 Views
Registered: ‎06-21-2017

Re: Behavioural siimulation match but the post-synthesis implementation no match

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You may have some poorly constructed code.  The process sensitivity list for the NEXT_STATE_DECODE includes the clk signal and clk is never used in the process.  This isn't your problem, but should be cleaned up.  More importantly, this is basically an asynchronous process except for the one statement :

 

if falling_edge(mdc) then
    mdio_i <= mdio_data(i);
    i <= i+1;
end if;

 

This will almost definitely simulate and synthesize differently.  In the simulation, the process will only run when one of the items in the sensitivity list changes state.  The synthesis tool will just make a bunch of concurrent statements out of the code, complete with latches and make a register for the falling edge statement.  My advice is to make your NEXT_STATE_DECODE  synchronous with clk and perform a falling edge detection on the mdio_i signal using clk.

4 Replies
Moderator
Moderator
748 Views
Registered: ‎03-16-2017

Re: Behavioural siimulation match but the post-synthesis implementation no match

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Hi @baldrism,

 

>>Is important that the simulations match between each other? - yes.

You need to check both behavioral  post synthesis functional simulation gives desired outputs or not as per your requirement. And then you need to compare it with Behavioral simulation to find out the specific signal causing difference. 

 

You can also do an analysis by comparing elaborated design and synthesized design it will make a clear picture for your and you can deduce by which hierarchy this issue has been generated. 

 

And you need to check the synthesis log file if any signals get trimmed or merged which is causing this mismatch or not. - If that is the issue you can use don't touch attribute to not getting trimmed or merged. 

 

Regards,

hemangd

 

Regards,
hemangd

Don't forget to give kudos and mark it as accepted solution if your issue gets resolved.
731 Views
Registered: ‎06-21-2017

Re: Behavioural siimulation match but the post-synthesis implementation no match

Jump to solution

You may have some poorly constructed code.  The process sensitivity list for the NEXT_STATE_DECODE includes the clk signal and clk is never used in the process.  This isn't your problem, but should be cleaned up.  More importantly, this is basically an asynchronous process except for the one statement :

 

if falling_edge(mdc) then
    mdio_i <= mdio_data(i);
    i <= i+1;
end if;

 

This will almost definitely simulate and synthesize differently.  In the simulation, the process will only run when one of the items in the sensitivity list changes state.  The synthesis tool will just make a bunch of concurrent statements out of the code, complete with latches and make a register for the falling edge statement.  My advice is to make your NEXT_STATE_DECODE  synchronous with clk and perform a falling edge detection on the mdio_i signal using clk.

Explorer
Explorer
719 Views
Registered: ‎04-26-2017

Re: Behavioural siimulation match but the post-synthesis implementation no match

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Thank you @bruce_karaffa,

 

I applied your code modification proposals and it worked. :) I've realised how much problems can occur if the design is not synchronous.

 

Thank you very much,

 

baldrism

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Moderator
Moderator
701 Views
Registered: ‎03-16-2017

Re: Behavioural siimulation match but the post-synthesis implementation no match

Jump to solution

Hi @baldrism,

 

Did your issue resolve? If yes, than close this thread by marking it as accepted solution. 

 

Regards,

hemangd

Regards,
hemangd

Don't forget to give kudos and mark it as accepted solution if your issue gets resolved.
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