UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
211 Views
Registered: ‎05-24-2019

Can I assign a location for registers in ucf file?

I am using ISE version 14.7. I would like to assign locations for registers in ucf file is that possible? Also can I assign locations for instances which I haven't made as an hard macro in ucf file. For example if I have a module named challenge c1(      ) , can I somehow assign LOC for "c1" in ucf file?

0 Kudos
5 Replies
Highlighted
Xilinx Employee
Xilinx Employee
183 Views
Registered: ‎07-16-2008

回复: Can I assign a location for registers in ucf file?

I'd suggest that you take a look at UG625, pg142, Location (LOC).

The applicable elements are primitives instances. So LOC is applicable for register but not hierarchical instances.

-------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
Historian
Historian
171 Views
Registered: ‎01-23-2009

Re: Can I assign a location for registers in ucf file?

So LOC is applicable for register but not hierarchical instances.

However, you can do floorplanning using the AREA_GROUP constraint - you can define a region of the FPGA die with an AREA_GROUP and then add hierarchical instances to that AREA_GROUP.

Why do you want to do this? Are you trying to improve timing?

In ISE, floorplanning can be used to improve timing if you really know what you are doing - a good floorplan can improve timing... However, a bad floorplan can really wreck timing! It takes a reasonable amount of expertise (and/or experimentation) to determine if a floorplan is good or bad.

Avrum

0 Kudos
134 Views
Registered: ‎05-24-2019

Re: Can I assign a location for registers in ucf file?

Thank you for the reply. I am trying to implement 4 bit arbiter PUF. I want to make the routing symmetric for the two PDL chains . Delay is my concern, so I wanted to give input to both the chains in such a way that both gets triggered simultaneously.

0 Kudos
130 Views
Registered: ‎05-24-2019

回复: Can I assign a location for registers in ucf file?

But since registers are assigned within the module, they are not shown as nets. The way I assign a location for an input or output port (NET "out<0>" LOC=G1;) or the way I assign location for instances such as INST h1_1 LOC=SLICE_X21Y59; I am not able to understand how to assign a location for a register since it doesnot show up in net list.

0 Kudos
Xilinx Employee
Xilinx Employee
94 Views
Registered: ‎07-16-2008

回复: Can I assign a location for registers in ucf file?

The registers objects are instances, rather than nets.

-------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos