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artg
Observer
Observer
10,437 Views
Registered: ‎05-20-2014

Can we force signals to '1' or '0' in the wave window of the vivado simulator ?

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Hi All,

 

I used to work with the ISIM simulator of ISE and in this simulator it was possible to force signals to '1'  or '0' during a simulation when you paused it.

 

Now I use the Vivado simulator is there a simular option for this or is it not possible ?

 

Thanks,

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vemulad
Xilinx Employee
Xilinx Employee
17,437 Views
Registered: ‎09-20-2012

Hi,

 

Yes this is possible.

 

In the "objects" window of simulation GUI if you right click on the signal you can find "Force constant" option. See below.

 

Capture.JPG

 

Thanks,

Deepika.

Thanks,
Deepika.
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vemulad
Xilinx Employee
Xilinx Employee
17,438 Views
Registered: ‎09-20-2012

Hi,

 

Yes this is possible.

 

In the "objects" window of simulation GUI if you right click on the signal you can find "Force constant" option. See below.

 

Capture.JPG

 

Thanks,

Deepika.

Thanks,
Deepika.
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pulim
Xilinx Employee
Xilinx Employee
10,424 Views
Registered: ‎02-16-2014

Hi,

 

To addon to Deepika if you want to force a clock signal you can use the Force clock option which is below the Force Constant option.

The same topic is discussed here,

http://forums.xilinx.com/t5/Simulation-and-Verification/Vivado-2014-2-Simulation-question/m-p/493582#M10490

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anusheel
Moderator
Moderator
10,421 Views
Registered: ‎07-21-2014

Hi,

 

Check below link

http://forums.xilinx.com/t5/Simulation-and-Verification/Vivado-XSIM-missing-features-versus-ISE-ISIM/td-p/400987

 

 

Thanks,

Anusheel

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artg
Observer
Observer
10,415 Views
Registered: ‎05-20-2014

thanks for all the replies, I find this a very useful function for some quick tests.

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