02-02-2014 03:44 PM
I am using DDR3 SDRAM in my system as data memory among other components, including a custom generated IP core which takes data from DDR3 through FSL. I am simulating the design and running for 5ms (simulation time). As it appears, there is no data on FSL bus from DDR3. How much time does it take for DDR3 initialization sequence to complete? I have got a message in console saying:
PHY_INIT: Memory Initialization completed at 7216926000
But I guess this refers to BRAM used by microblaze. Am I correct or it refers to DDR3? If it does, then why can't I see any data on data bus of either FSL or input to the IP core? (Possibility that I am monitoring a wrong signal!)
I checked one post on this forum and it says it takes 500ms to run the initialization sequence for DDR. In that case its impossible to run simulation as 5ms itself takes around 17-18 hrs to complete. Is there any workaround, any way to tackle this problem? Is ther any way to make the DDR initialize quicker?
02-02-2014 04:09 PM - edited 02-02-2014 04:36 PM
In 7 series based on your memory configuration data width, single/multi controllers etc., , initialization & calibration as a whole can take up to 15-20 minutes of your simulation time.
You can speed up this by setting SIM_BYPASS_INIT_CAL = "FAST", unlike 6 series OFF is not supported so 7 series MIG takes considerable amount of time due to phasers which can't be bypassed even in simulation to have relaible data capture.
Hope this helps
02-02-2014 04:51 PM
Do you mean 15-20 min on simulation clock? Because, in that case, it is prohibitively slow and impossible to simulate!
Also, I think I am using 6 series. I am using Virtex 6 development board and the version for DDR3 says
IP Type: mpmc
IP Version: 6.06.a
So, what approach do you suggest? If I use OFF, will DDR3 still work, as I need it to work to have data for energy profiling of the system.
Also, where can I set this parameter SIM_BYPASS_INIT_CAL ?
02-02-2014 05:19 PM
I found a document:
It says if we set SIM_BYPASS_INIT_CAL to fast, it will skip the initial 200us initialization delay. Does it mean it requires only 200us (simulation time) for initialization? In that case, I should eb able to see some activity on DDR after atleast 2-3 ms, right?
02-02-2014 06:15 PM
For V6 you can use "OFF" as well, it should be pretty quick, I have never waited for 2-3 ms
Can you check in standalone mode may be using MIG?
02-12-2014 12:05 AM