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Registered: ‎12-02-2012

DSP48E_2 not simulating correctly in XSI

I'm using a DSP48E_2 to perform multiplication, but when the module is driven in an XSI simulation it is just flat out not working. When I test inside of Vivado with a SystemVerilog testbench, the results work as expected. Pulling the waveforms shows that the inputs are exactly the same with the same relative timing, and comparing the commands fed to xelab doesn't show any differences beyond one building using the -dll option and the other not. Attached are the tb_ss.png, which shows the wavefrom of the in-Vivado testbench run producing the correct value, simulation.wdb, which has the waveform of the XSI driven testbench, and tb.zip, which includes the files for the SV testbench plus the DSP wrapper. If someone at Xilinx wants the XSI source code, I'd prefer to send that over PM instead of attaching it here.


This has been tested in both Vivado 2017.1 and 2017.3.

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