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Anonymous
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Direct block ram instantiation, initialization file

Hi,

 

Is it possible to initialize a RAMB16BWER in VHDL for both simulation and implementation using a file rather than the INIT(P)_xx attributes?

 

I've been using the RAMB16BWER primitive in a design, initialized via the INIT_xx and INITP_xx attributes. The initial values are generated via a script, so it's annoying to have to update the .vhd file every time I make a change there. The language template indicates there's an INIT_FILE attribute but I can't seem to find any information about the format of this file. I've tried giving it a MIF and a MEM file, both of which it will accept (versus a COE which it won't), but when I simulate it the memory is empty.

 

Cheers,

Jw

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Historian
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Registered: ‎02-25-2008


@Anonymous wrote:

Hi,

 

Is it possible to initialize a RAMB16BWER in VHDL for both simulation and implementation using a file rather than the INIT(P)_xx attributes?

 

I've been using the RAMB16BWER primitive in a design, initialized via the INIT_xx and INITP_xx attributes. The initial values are generated via a script, so it's annoying to have to update the .vhd file every time I make a change there. The language template indicates there's an INIT_FILE attribute but I can't seem to find any information about the format of this file. I've tried giving it a MIF and a MEM file, both of which it will accept (versus a COE which it won't), but when I simulate it the memory is empty.

 

Cheers,

Jw


Look in the XST User Guide for "Specifying RAM Initial Contents in an External Data File."

----------------------------Yes, I do this for a living.
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