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Registered: ‎06-16-2021

ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'C:/ProyectosXilinx/DDS_27del7/DDS_27del7/DDS_27del7.sim/sim_1/behav/xsim/elaborate.log' file for mor


I have an RTL file that I was able to simulate until the antivirus blocked the simulation for me. Then I deactivated the antivirus again and had to force the closure of vivado.
When I reopen the project and simulate I get the following error:

- ERROR: [USF-XSim-62] step 'elaborated' failed with error (s). See the Tcl console output or the file 'C: /ProyectosXilinx/DDS_27del7/DDS_27del7/DDS_27del7.sim/sim_1/behav/xsim/elaborate.log' for more information.
ERROR: [Vivado 12-4473] Error detected when running simulation. Correct the problem and try this operation again.
launch_simulation: Time (s): cpu = 00:00:05; elapsed = 00:00:07. Memory (MB): peak = 792,398; profit = 5,070
ERROR: [Common 17-39] 'launch_simulation' failed due to previous errors.

I go to the elaborate.log file and I run into this error:

- Vivado Simulator 2018.3
Copyright 1986-1999, 2001-2018 Xilinx, Inc. All Rights Reserved.
Running: C:/Xilinx/Vivado/2018.3/bin/unwrapped/win64.o/xelab.exe -wto 3fbe629765a44c0d99d097bc63ccf7b8 --incr --debug typical --relax --mt 2 -L xil_defaultlib -L xilinx_vip -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot Zynq7020_wrapper_behav xil_defaultlib.Zynq7020_wrapper xil_defaultlib.glbl -log elaborate.log
Using 2 slave threads.
Starting static elaboration
Completed static elaboration
Starting simulation data flow analysis
Completed simulation data flow analysis
ERROR: [XSIM 43-3356] Could not open file xsim.dir/Zynq7020_wrapper_behav/xsim.type for writing.
ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... Can you help me? Thanks a lot.


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Registered: ‎06-21-2017

Have you tried the reset_simulation command?  This should clear the xsim folder.  If this doesn't work, you could try deleting the xsim folder and/or rebooting the PC to close all the files.

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