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ilans
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Registered: ‎12-20-2020

Entity was not selected for default binding because it is out of date relative to dependency ieee.std_logic_textio

Hi All,

I am tryin to run a UVM environment in which it's DUT is in VHDL and is using xilinx libraries.

I am using Questa and I am getting this ERROR message:

Error (suppressible): C:/_plastic/FPGA_VSATQ/Vivado/VSATQ_XCZU5EG-FBVB900-2-I/VSATQ_XCZU5EG-FBVB900-2-I.srcs/sources_1/ip/data_fifo_tx_side_1_clk_latency_1/data_fifo_tx_side_1_clk_latency_sim_netlist.vhdl(2590): (vopt-1127) Entity unisim.ramb36e2 was not selected for default binding because it is out of date relative to dependency ieee.std_logic_textio.
# ** Error (suppressible): C:/_plastic/FPGA_VSATQ/Vivado/VSATQ_XCZU5EG-FBVB900-2-I/VSATQ_XCZU5EG-FBVB900-2-I.srcs/sources_1/ip/ctrl_fifo_tx_side_1/ctrl_fifo_tx_side_sim_netlist.vhdl(1873): (vopt-1127) Entity unisim.ramb18e2 was not selected for default binding because it is out of date relative to dependency ieee.std_logic_textio.
# Optimization failed

any Idea what does it mean?

regards

Ilan

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richardhead
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Registered: ‎08-01-2012

Is it possible the code was compiled with a different version of modelsim? This kind of error usually occurs when theres a version missmatch.

Can you recompile with the correct version?

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