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Participant gmoore
Participant
1,333 Views
Registered: ‎08-29-2016

Error Simulating with Cadence Simvision

Hi,

 

This post is caused by the same issues outlined in the thread linked below : 

 

https://forums.xilinx.com/t5/Simulation-and-Verification/mipi-dphy-rx-tx-simulation-with-Cadence-Simvision/m-p/802489#M19797

 

Within that thread, it was suggested to me that if I followed the steps outlined in this thread, the issue would be solved: 

 

https://forums.xilinx.com/t5/Simulation-and-Verification/compile-simlib-error-again-after-INCISIV-version-fix/td-p/539099 

 

 

However, that is not the case. The error persists, even after performing the additional necessary correction of editing the filepaths, as suggested by kynthia9:

 

https://forums.xilinx.com/t5/Simulation-and-Verification/compile-simlib-error-again-after-INCISIV-version-fix/m-p/540383/highlight/true#M11397

 

After I edit the .cmd files I get the following errors: 

 

.cxl.vhdl.unisim.unisim.lin64.cmd


ncvhdl(64): 15.10-s014: (c) Copyright 1995-2016 Cadence Design Systems, Inc.
/cad/adi/apps/xilinx/vivado/2017.1/Vivado/2017.1/data/vhdl/src/unisims/unisim_retarget_VCOMP.vhdp:
ncvhdl_p: *F,DLUNNE: Can't find STANDARD at /cad/adi/apps/cadence/incisive/linux/15.20-s30/tools.lnx86/inca/files/STD.
ncvhdl(64): 15.10-s014: (c) Copyright 1995-2016 Cadence Design Systems, Inc.
/cad/adi/apps/xilinx/vivado/2017.1/Vivado/2017.1/data/vhdl/src/unimacro/unimacro_VCOMP.vhd:
ncvhdl_p: *F,DLUNNE: Can't find STANDARD at /cad/adi/apps/cadence/incisive/linux/15.20-s30/tools.lnx86/inca/files/STD.
ncvhdl(64): 15.10-s014: (c) Copyright 1995-2016 Cadence Design Systems, Inc.
/cad/adi/apps/xilinx/vivado/2017.1/Vivado/2017.1/data/vhdl/src/unifast/primitive/DSP48E1.vhd:
ncvhdl_p: *F,DLUNNE: Can't find STANDARD at /cad/adi/apps/cadence/incisive/linux/15.20-s30/tools.lnx86/inca/files/STD.

 

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3 Replies
Moderator
Moderator
1,319 Views
Registered: ‎09-15-2016

Re: Error Simulating with Cadence Simvision

Hi @gmoore,

 

Are you seeing this issue with Incisive Enterprise 15.20.014 ?

 

Thanks,

prathikm

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Participant gmoore
Participant
1,272 Views
Registered: ‎08-29-2016

Re: Error Simulating with Cadence Simvision

The version of IES I am using is 15.20-s30

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Highlighted
Xilinx Employee
Xilinx Employee
1,224 Views
Registered: ‎10-24-2013

Re: Error Simulating with Cadence Simvision

Hi @gmoore

Do you have a vivado based project? If yes, can you try running export_simulaion command in the tcl console.

This will create the sample scripts required to run the design in IES. You may use them to compare against your custom scripts and do the necessary modifications,

Thanks,Vijay
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