UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Newbie raji55544
Newbie
158 Views
Registered: ‎06-01-2019

FATAL_ERROR

Hi iam getting the following error in Xilinx ISE Suite 14.2 . Please help me on this.What could be the wrong with my project..

 

FATAL_ERROR:Simulator:CompilerAssert.h:40:1.67 - Internal Compiler Error in file ../src/VhdlExpr.cpp at line 587 Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support.
FATAL_ERROR:Simulator:CompilerAssert.h:40:1.67 - Internal Compiler Error in file ../src/VhdlExpr.cpp at line 587 Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support.

0 Kudos
1 Reply
Moderator
Moderator
111 Views
Registered: ‎09-15-2016

Re: FATAL_ERROR

Hi @raji55544 ,

I tried checking this code at my end and i see that the fatal error occurs due to the below assignment of x1,x2,x3 of module instantiation dadda_multi, as while tried commenting these i was able to run through simulation without any issues.

dadda.JPG

Hence, please try portmapping the instantiation module properly in the top module.

 

Thanks & Regards,
Sravanthi B
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
0 Kudos