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howlz
Visitor
Visitor
14,474 Views
Registered: ‎02-12-2014

Find the errors in the Verilog Code

Hello guys, below is a peice of verilog code, there are 5 errors in the code, please highlight/underline the errors and correct them. (please make sure to underline/highlight the errors/changes you have made. Thank you.

 

 

module multiplier (clk, M, A, B, P)

   input clk, M;

   input [7:0] A;

   input [3:0] B;

   output [11:0] P;

   wire [8:0] temp;

   reg [11:0] P;

   adder  (temp, P[11:4], A);

   always @(posedge clk)

       if(!M)

           P <= {8'b0, B};

   always @(posedge clk);

      begin

         if(M)

           if (P[0])

              P <= {temp, P[3:0]} >> 1;

          else

           P <= P >> 1;

   end

endmodule

 

 

module adder ( X, Y);

   input [7:0] X, Y;

   output [8:0] Cout_Sum;

     assign Cout_Sum = X + Y;

endmodule

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16 Replies
pratham
Scholar
Scholar
14,457 Views
Registered: ‎06-05-2013

Hello,

We are not here to correct your codes. you should be able to do it by your self.

module multiplier (clk, M, A, B, P);

 

Rest errors you should find by your self.

-Pratham

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vijayak
Xilinx Employee
Xilinx Employee
14,452 Views
Registered: ‎10-24-2013

Hi,
May I know the intention of this post? Forums are for those who has issues and need help to solve them, not for puzzles.

Thanks,Vijay
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pratham
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Registered: ‎06-05-2013

Hello,

 

I feel you should read verilog books for proper syntax and coding styles.

 

Try to find out the mistakes you have done..there are no of mistakes which simply i cant point out here. May be you can take a look at the modifed code and see what went wrong.

-Pratham

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debrajr
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Registered: ‎04-17-2011

Easiest way is to run Check Syntax in ISE and fix the error for yourself :) We at Forums are here to help and not solve puzzles.
Regards,
Debraj
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howlz
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Registered: ‎02-12-2014

Well it's actually an assignment not a random puzzle, and we literally just started the class. So I have no clue as to what's going on here.

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pratham
Scholar
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14,406 Views
Registered: ‎06-05-2013

Hello,

The way you said was totally incorrect. No one is here to correct your assignment.

would be better  if you think before post!!!

-Pratham

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howlz
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Registered: ‎02-12-2014

Sorry didn't mean to upset you guys, this is my first time posting here. Really sorry.
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bassman59
Historian
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14,396 Views
Registered: ‎02-25-2008


@howlz wrote:

Hello guys, below is a peice of verilog code, there are 5 errors in the code, please highlight/underline the errors and correct them. (please make sure to underline/highlight the errors/changes you have made. Thank you.


I've contacted your professor and informed him that you're asking others on a public forum to do your homework for you.

 

Expect a failing grade this semester.

----------------------------Yes, I do this for a living.
muzaffer
Teacher
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14,383 Views
Registered: ‎03-31-2012

>> Hello guys, below is a peice of verilog code, there are 5 errors in the code, please highlight/underline the errors and correct them. (please make sure to underline/highlight the errors/changes you have made.

are you really trying to get us to do your homework?
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howlz
Visitor
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11,526 Views
Registered: ‎02-12-2014

Hello muz and bass man. It may seem so but I just want to know what the errors are personally. I've already done it, I just need reassurance.
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muzaffer
Teacher
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11,522 Views
Registered: ‎03-31-2012

if that's the case, post your answers and ask if they are correct. earlier you said: "So I have no clue as to what's going on here." so you might be able to use the commentary.

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howlz
Visitor
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11,510 Views
Registered: ‎02-12-2014

I have written all the errors I could find in RED, apologies again, I noticed I clearly upset a lot of people and I am truly sorry for the misunderstanding.

 

 

 

module multiplier (clk, M, A, B, P); There isn't a semicolon here

   input clk, M;

   input [7:0] A;

   input [3:0] B;

   output [11:0] P;

   wire [8:0] temp;

   reg [11:0] P;

   adder  (temp, P[11:4], A); Adder doesn't have a name

   always @(posedge clk)

       Begin

        if(!M)

       End

           P <= {8'b0, B};

   always @(posedge clk); There shouldn't be a semi-colon here

      begin

         if(M)

           if (P[0])

              P <= {temp, P[3:0]} >> 1;

          else

           P <= P >> 1;

   end

endmodule

 

 

module adder ( X, Y); Cout_Sum isn't declared here

   input [7:0] X, Y;

   output [8:0] Cout_Sum;

     assign Cout_Sum = X + Y;

endmodule

debrajr
Moderator
Moderator
11,502 Views
Registered: ‎04-17-2011

Thats good! If using Project Navigator Check Syntax would come handy as we all at some point of time have committed Syntax errors :) Happy Posting!!
Regards,
Debraj
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bassman59
Historian
Historian
11,491 Views
Registered: ‎02-25-2008


@howlz wrote:
Hello muz and bass man. It may seem so but I just want to know what the errors are personally. I've already done it, I just need reassurance.

isn't that why you pay your instructors? You should be able to go to the teaching assistant or the class instructor and have it explained to you.

----------------------------Yes, I do this for a living.
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mnfsoft
Visitor
Visitor
11,198 Views
Registered: ‎04-18-2014

this is my initial look there are still errors

 

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 16:36:46 04/18/2014
// Design Name:
// Module Name: Multiplier
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module multiplier (input clk, M, A, B, output P);
//input clk, M;
//input [7:0] A;
//input [3:0] B;
//output [11:0] P;
wire [8:0] temp;
reg [11:0] P;
adder (temp, P[11:4], A);
always @(posedge clk)
if(!M)
P <= {8'b0, B};
always @(posedge clk);
begin
if(M == 1)
if (P[0] == 1)
P <= {temp, P[3:0]}; //>> 1;
else
P <= P ;//>> 1;
end
endmodule


module adder ( X, Y);
input [7:0] X, Y;
output [8:0] Cout_Sum;
assign Cout_Sum = X + Y;
endmodule

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vijayak
Xilinx Employee
Xilinx Employee
11,154 Views
Registered: ‎10-24-2013

Hi,
@mnfsoft Can you post a new topic & also mention the error you are seeing.
Thanks,Vijay
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