UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Reply

How to add/link C library (.so) in Simulation

Highlighted
Visitor
Posts: 5
Registered: ‎07-03-2018

How to add/link C library (.so) in Simulation

Hello everyone,

 

In modelsim, I can simulate IPCore with C library(.so) by options -pli. So how can I do the same thing in Vivado?

 

PS: Verilog PLI (Programming Language Interface) is a mechanism to invoke C or C++ functions from Verilog code.

 

Thank you,

Xilinx Employee
Posts: 1,246
Registered: ‎07-16-2008

回复: How to add/link C library (.so) in Simulation

Vivado Simulator supports SystemVerilog Direct Programming Interface (DPI) to bind C code to SystemVerilog code.

You can find more information from UG900, pg 190, Direct Programming Interface (DPI) in Vivado Simulator

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug900-vivado-logic-simulation.pdf

-------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------