03-30-2015 11:30 PM
What's the best way to create a test bench for system_stub.vhd that contrain system component, its
Instantiation and bunch of other blocks, etc? End up renaming system_stub.vhd to system_stub_tb.vhd and removed system component and its instantion and created the system's clk and reset inside the system_stub_tb.vhd. Is there a better way to do this? Is there any example out?
03-31-2015 02:20 AM
03-31-2015 02:12 PM
Hi I reviewed it but didn't find it much useful beside creating a empty testbench LOL Is there any tutorial or apps note on how to simulate a zynq emmbeded design?
09-22-2015 04:07 PM
09-22-2015 08:51 PM