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Explorer
Explorer
9,155 Views
Registered: ‎03-10-2015

How to create test bench for system_stub.vhd

hello,

 

  What's the best way to create a test bench for system_stub.vhd that contrain system component, its

Instantiation and bunch of other blocks, etc?  End up renaming system_stub.vhd to system_stub_tb.vhd and removed system component and its instantion and created the system's clk and reset inside the system_stub_tb.vhd. Is there a better way to do this? Is there any example out?

 

Best regards,

Fred

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Xilinx Employee
Xilinx Employee
9,144 Views
Registered: ‎07-01-2010

Re: How to create test bench for system_stub.vhd

Fred,

Refer to the discussion in the thread which may give you some insight.
http://forums.xilinx.com/t5/Design-Entry/Vivado-How-to-create-automatic-testbench-files/td-p/266396

Few IP in the Vivado IP catalog generate testbench for testing.

Regards,
Achutha
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Explorer
Explorer
9,130 Views
Registered: ‎03-10-2015

Re: How to create test bench for system_stub.vhd

Hi I reviewed it but didn't find it much useful beside creating a empty testbench LOL Is there any tutorial or apps note on how to simulate a zynq emmbeded design?

 

Regards, Fred

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Explorer
Explorer
8,484 Views
Registered: ‎03-10-2015

Re: How to create test bench for system_stub.vhd

hello @achutha,

 

  You never get back to me regarding the questions I asked about writing a testbench for an embeded system? Any help?

 

Fred

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Moderator
Moderator
8,478 Views
Registered: ‎04-17-2011

Re: How to create test bench for system_stub.vhd

Have your checked the XAPP: http://www.xilinx.com/support/documentation/application_notes/xapp744-HIL-Zynq-7000.pdf ?
Regards,
Debraj
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