UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
581 Views
Registered: ‎01-31-2018

How to design Transfer Function in xilinx system generator .

hi Every one please help in that how to design transfer function using xilinx system generator Blocks ??

here the attached transfer function please help .

Tags (1)
WhatsApp Image 2018-01-31 at 8.29.02 PM.jpeg
0 Kudos
1 Reply
Scholar jmcclusk
Scholar
556 Views
Registered: ‎02-24-2014

Re: How to design Transfer Function in xilinx system generator .

If this is an analog transfer function in the s domain, you need to convert it first into a Z transform.   The system generator blockset can only handle Z transform equations, since FPGA signal processing is always discrete time.  See the Matlab site for methods to convert a continuous time domain transfer function to a discrete time transfer function.

Don't forget to close a thread when possible by accepting a post as a solution.
0 Kudos