06-23-2019 10:56 PM
I use ModelSim DE (64 bit windows) for logic simulation.
I use MMCM (clk_wiz_0) created from IP catalog for my design.
However, I do not know how to generate the MMCM logic simulation library.
Please tell me how to generate MMCM simulation library for logic simulation in ModelSim DE.
I will attach an MMCM specification for my design. I want to generate a logic simulation library for this MMCM ModelSim DE.
06-23-2019 11:10 PM
You need to run Tcl command 'compile_simlib' to compile Vivado simulaiton libraries for 3rd party tools.
This can be launched from Vivado GUI Tools > Compile Simulation Libraries..., or manually run the command from Tcl console.
For its usage, type 'compile_simlib -help' for help manual.
06-24-2019 12:15 AM
06-24-2019 12:33 AM
The MMCM cell is within library unisim (VHDL) or unisims_ver (Verilog).
If you run simulation in Modelsim standalone, you need to load the library via -L switch.
If you launch simulation from within Vivado GUI, the tool will generate appropriate simulation script and start Modelsim GUI.
06-24-2019 07:25 AM
06-24-2019 05:50 PM
The -L (capital letter) switch is expected to be used in vopt/vsim, e.g. -L unisims_ver
You need to put the modelsim.ini that compile_simlib generates into the current simulation directory. This allows Modelsim to search the pre-compiled libraries.
I'd suggest that you run export_simulation command (or File > Export > Export Simulation) in Vivado to export a simulation script for the Vivado project targetting Modelsim. Use that as a starting point for your own one.