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Observer shencho
Observer
9,026 Views
Registered: ‎01-01-2016

How to initialize Block RAM in BRAM Controller mode in Vivado simulation

Hi,

 

In Vivado I want to initialize the Block RAM (Block RAM Generator 8.3 in BRAM Controller mode) before running simulation. However I cannot find information about how to do that. There are information about how to initialize BRAM in bitstream, but not in simulation. I also tried the write_mmi.tcl script but it requires me to "open an elaborated, synthesized or implemented design before executing this command," but I only want to run simulation. Please kindly help. Thanks.

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Xilinx Employee
Xilinx Employee
8,834 Views
Registered: ‎09-20-2012

Re: How to initialize Block RAM in BRAM Controller mode in Vivado simulation

Hi @shencho

 

When using IP integrator, the initialization in BRAM Controller Mode is done only through the MEM file. For more details, see “MEM Files” of the Data2MEM User Guide (UG658) http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/data2mem.pdf

 

Thanks,

Deepika.

Thanks,
Deepika.
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Observer shencho
Observer
8,822 Views
Registered: ‎01-01-2016

Re: How to initialize Block RAM in BRAM Controller mode in Vivado simulation

Hi Deepika,

 

Thanks for the reply. I already checked that document before asking. A simpler question is: How can I assign a MEM file to a BRAM? The field to assign MEM file is grayed out in Block RAM Generator 8.3 (Vivado 2015.3):

 

Inline image 1

 

Is there any TCL command to assign a MEM file to a BRAM? Or I'm completely wrong about how to use the MEM file? Thanks.

 

BTW, I just want to run behavior simulation.

 

--

Shencho

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