cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
arash9k
Adventurer
Adventurer
11,818 Views
Registered: ‎02-12-2013

How to show waveform in Vivado simulation window? The waveform is absent for some signals.

Jump to solution

Hi,

 

I have the following verilog code:

 

`timescale 1ns / 1ps

module top(

    );
    
    reg clk = 1;
always #1.25 clk <= ~clk; wire temp; //wire temp2; // added later

assign temp = clk; //assign temp2 = clk; //added later
endmodule

 When I simulate this, I see "CLK" as expected but "temp" just has the value 1 and no waveform. When I uncomment the lines marked as "//added later", I can see "CLK" and "temp2" waveforms as expected. But "temp" is still stuck at 1 and there's not waveform for it.

 

Then I commented the lines marked as "//added later" again and there's not waveform for "temp". Then I renamed "temp" to "temp2" and simulated. This time I could see "CLK" and "temp2" waveforms in the simulation window toggling as expected.

 

It could be that I'm just not seeing the waveforms. For example in the first scenario, I'm just seeing a "1" and no waveform. There are also some other signals that when added to the wave window don't show a waveform. How can I enable the waveform?

 

Thanks,

 

 

0 Kudos
1 Solution

Accepted Solutions
arash9k
Adventurer
Adventurer
15,884 Views
Registered: ‎02-12-2013
:))) I just had to run the simulation again by clicking on any of the blue "run" icons on the toolbar.Then, the waveforms would appear. When adding some signals to the wave window you can see the waveforms right away but some don't show it until you rerun.

View solution in original post

5 Replies
nbrowdu
Xilinx Employee
Xilinx Employee
11,772 Views
Registered: ‎07-16-2012

Assigning the clock to a wire seemed to work with me, although I set up my clock stimulus slightly differently.

 

I used an always construct, as you did, but I contained it to a module, then assigned outside the module. Here is an example

 


// Note: CLK must be defined as a reg when using this method

parameter PERIOD = <value>;

wire temp;

 

 

 

always begin
CLK = 1'b0;
#(PERIOD/2) CLK = 1'b1;
#(PERIOD/2);
end

 

assign temp = CLK;

0 Kudos
arash9k
Adventurer
Adventurer
11,761 Views
Registered: ‎02-12-2013

I tried using a separate module for clock generation as you suggested. In my top level module I instantiate two clocks "CLK_20MHz" and "CLK_25MHz". When I simulate I can see the waveform of both clocks. Then, from the clock module, I add the register "CLK". However, I see no waveforms for "CLK". But when I add "$monitor("%d,\t%b",$time, CLK);" inside the clock module, I can see in the logs that "CLK" is actually toggling as expected. I don't know why the simulation window doesn't show the waveform? And how I can show/enable the waveform?  

0 Kudos
arash9k
Adventurer
Adventurer
15,885 Views
Registered: ‎02-12-2013
:))) I just had to run the simulation again by clicking on any of the blue "run" icons on the toolbar.Then, the waveforms would appear. When adding some signals to the wave window you can see the waveforms right away but some don't show it until you rerun.

View solution in original post

hulk789
Explorer
Explorer
8,934 Views
Registered: ‎07-13-2015

@nbrowdu @arash9k Is there any substitute besides re-running the simulation.

0 Kudos
debrajr
Moderator
Moderator
8,893 Views
Registered: ‎04-17-2011
Not in XSIM though. If you adding new signals from the sub-modules then you may need to reset the time to 0 and then run -all again.
Regards,
Debraj
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------