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Contributor
Contributor
8,980 Views
Registered: ‎03-28-2015

How to write the value of a signal in a file in signed decimal or hexadecimal formate using verilog or vhdl

I want to write the value of a signal in a file in signed decimal or hexadecimal formate. so any one help me in this.

 

thanks

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Xilinx Employee
Xilinx Employee
8,977 Views
Registered: ‎05-07-2015

Re: How to write the value of a signal in a file in signed decimal or hexadecimal formate using verilog or vhdl

Hi @d2d


Using verilog

f = $fopen("output.txt","w");
$fwrite(f,"%d\n", <wire/reg name>);

 Formatting:

%d or %D for decimal
%h or  %H for hexadecimal

 

Thanks
Bharath
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Moderator
Moderator
8,974 Views
Registered: ‎04-17-2011

Re: How to write the value of a signal in a file in signed decimal or hexadecimal formate using verilog or vhdl

For VHDL, example:

architecture log_to_file of FILE_LOG is

file l_file: TEXT open write_mode is log_file;

begin

while true loop
write(l, str(x1)&" "& hstr(x2)& "h");
writeline(l_file, l);
end loop;

Ensure to add use std.textio.all;
Regards,
Debraj
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Teacher
Teacher
8,955 Views
Registered: ‎03-31-2012

Re: How to write the value of a signal in a file in signed decimal or hexadecimal formate using verilog or vhdl

in addition to $fwrite you can also use $display and redirect the output to a file too. $fwrite & $display use a formatting string similar to printf in C so %d is is for decimal & %x is for hex.
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