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Adventurer
Adventurer
5,051 Views
Registered: ‎04-14-2016

ISE 14.7 simulation failed

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Hello, I have a Virtex-7 design from Vivado (working fine) transfered to a Virtex-6 just for testing. After changing the design, the static checks are all fine and the simulation is generated. But when I start the simulation and ISim opens, it stops immidately with the following error message:

ISim log file
Running: /mnt/intspace2/space/home/burk/work_ise/gtx_test/DEMO_TB_IMP_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /mnt/intspace2/space/home/burk/work_ise/gtx_test/DEMO_TB_IMP_isim_beh.wdb 
ISim P.20131013 (signature 0xfbc00daa)
This is a Full version of ISim.
ERROR: Value -2147483648 is out of valid range : 0 TO 3 of type Time resolution is 1 fs
# onerror resume
# wave add /
No active Database
# run 1000 ns
Unable to execute live simulation command.
# exit 0

I have seen a similiar thread here (https://forums.xilinx.com/t5/Simulation-and-Verification/Can-t-understand-error-message-of-ISim/td-p/42066) but I failed to find the mentioned code in my design. Can somebody please help me, I have attatched my code.

I don't know if this is the correct subforum for synthese, but if so, I would also like to know in general if there are any problems with ISE synthese and 32bit tristate busses. If have one and in Vivado it works fine while in ISE it results in XST.528 error:

Xst:528 - Multi-source in Unit <GT_DRPUnit> on signal <bus_drp_int_addressctrl<31>>; this signal is connected to multiple drivers.

(the same for the other 31bits)

Thank you!

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Adventurer
Adventurer
9,392 Views
Registered: ‎04-14-2016

Re: ISE 14.7 simulation failed

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I found the error, an integer was connected to an integer range 0 to 3. But it's name was not ERROR, the error message from ISim was no help. Interesting: Same code is synthesized in ISE und Vivado and simulated in Vivado without any problem.

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Adventurer
Adventurer
4,978 Views
Registered: ‎04-14-2016

Re: ISE 14.7 simulation failed

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Well, I have fixed the Xst:528 error (it was related to a reset signal triggered statement). So ISE now implements my design without any errors and generates the bitfile. But simulation continues to result in this error (the mentioned type ERROR is not reachable with the ISE text search and I am sure I have not seen such a type in my design too). Anyone know something about this error?

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Adventurer
Adventurer
9,393 Views
Registered: ‎04-14-2016

Re: ISE 14.7 simulation failed

Jump to solution

I found the error, an integer was connected to an integer range 0 to 3. But it's name was not ERROR, the error message from ISim was no help. Interesting: Same code is synthesized in ISE und Vivado and simulated in Vivado without any problem.

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