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Visitor grpasche
Visitor
10,404 Views
Registered: ‎07-30-2013

ISE Simulator, internal signals

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Hello,

 

Is there a way to observe internal signals (signals other than input/output ports. signals that are only visible inside entities) when running a behavioral simulation of a VHDL code?

 

For example:

 

entity Trig_S10453 is

  Port ( CLK: in STD_LOGIC;

            ST_CLK: out STD_LOGIC

          );

end Trig_S10453;

 

architecture Behavioral of Trig_S10453 is

SIGNAL Cpt_intgr: STD_LOGIC_VECTOR (11 downto 0):= x"000";

SIGNAL ST_CLK_INV: STD_LOGIC:= '0';

 

PROCESS(CLK)

BEGIN

 if (CLK'EVENT and CLK= '1') then

   Cpt_intgr<= Cpt_intgr+1;

end if;

end PROCESS;

 

ST_CLK_INV<= not CLK;

ST_CLK<= ST_CLK_INV;

 

end Behavioral;

 

How I can to observe tne internal signal  "Cpt_intgr" with ISE Simulation

 

Thanks in advance

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Adventurer
Adventurer
14,471 Views
Registered: ‎01-15-2013

Re: ISE Simulator, internal signals

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Hi,

I have the same question. I usually use modelsim for functional simulation. In my design, I am using some IP's from IP Catlog from Xilinx. Hence, I found it better to simulate in Xilinx ISIM. Howver, i was just able to view signal of the top module (all internal signals of sub-modules are hidden). Can I see the internal signals of a submodule ?

Paul
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Scholar pratham
Scholar
10,398 Views
Registered: ‎06-05-2013

Re: ISE Simulator, internal signals

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Hi

 

Click on + Symbol which is under the objects which is for internal signal.

 

Regards,

Pratham

-Pratham

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Visitor grpasche
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10,382 Views
Registered: ‎07-30-2013

Re: ISE Simulator, internal signals

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hello,

 

I tried to used the "Simulate Post-Fit Model", but I do not observe internal signals in the ISE Simulation ?

What should I do to see the "SIGNAL Cpt_intgr".

 

Thany you for your answer

Grégoire

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Highlighted
Adventurer
Adventurer
14,472 Views
Registered: ‎01-15-2013

Re: ISE Simulator, internal signals

Jump to solution
Hi,

I have the same question. I usually use modelsim for functional simulation. In my design, I am using some IP's from IP Catlog from Xilinx. Hence, I found it better to simulate in Xilinx ISIM. Howver, i was just able to view signal of the top module (all internal signals of sub-modules are hidden). Can I see the internal signals of a submodule ?

Paul
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Visitor grpasche
Visitor
10,353 Views
Registered: ‎07-30-2013

Re: ISE Simulator, internal signals

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Hello,

 

I found how to observe internal signal with Xilinx ISim:

 

In Xilinx ISE click "Simulate Behavioral Model"

In Xilinx ISim, under "Instance and Process Name" click "Name_tbw.vhd" and "uut". Under objects they are internals Signals.

 

Thank you for your help.

Grégoire

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Newbie arundhyani
Newbie
9,993 Views
Registered: ‎04-11-2014

Re: ISE Simulator, internal signals

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for internal signals of submodule while simulating a top module ,in xilinx isim 

1. first go to instances and processes and choose the submodule from which signal you have tocheck 

2,then go to objects you will find all the internal signals 


@grpasche wrote:

Hello,

 

I found how to observe internal signal with Xilinx ISim:

 

In Xilinx ISE click "Simulate Behavioral Model"

In Xilinx ISim, under "Instance and Process Name" click "Name_tbw.vhd" and "uut". Under objects they are internals Signals.

 

Thank you for your help.

Grégoire


 

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Newbie arundhyani
Newbie
9,992 Views
Registered: ‎04-11-2014

Re: ISE Simulator, internal signals

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‎04-11-2014 04:09 PM

for internal signals of submodule while simulating a top module ,in xilinx isim
1. first go to instances and processes and choose the submodule from which signal you have tocheck
2,then go to objects you will find all the internal signals
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