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8,683 Views
Registered: ‎09-10-2015

ISIM loop unrollment gives multiple drivers?

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I have a design and I use ISIM for simulation.

In the code I have the following loop:

for x in 3 to 1 loop
	a(x) <= a(x-1);
end loop;

To my knowledge this will unroll to be

a(3)	<= a(2);
a(2)	<= a(1);
a(1)	<= a(0);

This is used as a synchroniser for clock-crossing. a(0) is assinged a value on the source clock, and the rest is clocked on the destination clock. ISIM however gives no warnings on this, but also does not assign values (all are 'U'). If I unroll manualy (the second code fragment) it simulates as expected. Does anyone have any experience with this problem, if so would you point me in the right direction?

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Xilinx Employee
Xilinx Employee
16,447 Views
Registered: ‎05-07-2015

Re: ISIM loop unrollment gives multiple drivers?

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HI @pietervanderstar

Are you seeing this only behavioral simulation alone? is the post translate simulation working as expected?

 

If its happenning only in behavioral simulation.
Can you try initilize the 'a' std_logic_vector to '0'  or 'Z' and try again?

 

signal a  : std_logic_vector(3 downto 0):= (OTHERS => '0');

 

Thanks
Bharath
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8 Replies
Xilinx Employee
Xilinx Employee
16,448 Views
Registered: ‎05-07-2015

Re: ISIM loop unrollment gives multiple drivers?

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HI @pietervanderstar

Are you seeing this only behavioral simulation alone? is the post translate simulation working as expected?

 

If its happenning only in behavioral simulation.
Can you try initilize the 'a' std_logic_vector to '0'  or 'Z' and try again?

 

signal a  : std_logic_vector(3 downto 0):= (OTHERS => '0');

 

Thanks
Bharath
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Explorer
Explorer
8,662 Views
Registered: ‎04-28-2015

Re: ISIM loop unrollment gives multiple drivers?

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Hi @pietervanderstar,

 

I suspect this must be because of 

for x in 3 to 1 loop

 Please change this to:

for x in 3 downto 1 loop


Let me know if this helps.

Thanks,
Tushar
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8,650 Views
Registered: ‎09-10-2015

Re: ISIM loop unrollment gives multiple drivers?

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Sorry

for x in 3 to 1 loop

was a typo in this forum. My code uses downto.

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8,628 Views
Registered: ‎09-10-2015

Re: ISIM loop unrollment gives multiple drivers?

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I cannot perform post translate simulation (ISE14.7), but initializing did the trick. I first initialized to '0' but that left one bit with X, so I tried different values. Initializing to 'Z' worked as expected, exept that during reset I assign a (which is an array of an array of std_logic_vectors) as follows:

a(3 downto 1) <= (others => (others => (others=>'0')));

This reset all values exept a(1) this has 'U' on 5 downto 0; This is then shifted out as expected and never to be seen again. It works for my purposes but still a bit strange I think.
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Xilinx Employee
Xilinx Employee
8,621 Views
Registered: ‎05-07-2015

Re: ISIM loop unrollment gives multiple drivers?

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HI @pietervanderstar

 

Good to know that it worked.

I am  quite sure you will be facing this issue only in behavioural simulation.
std_gloic in VHDL behaviroual simulation is 9 vlaued resolved logic. As resolving 'U' with any value will result in 'U'. it is always safe to initialize signals to '0' or 'Z' in VHDL design .



Thanks
Bharath
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8,617 Views
Registered: ‎09-10-2015

Re: ISIM loop unrollment gives multiple drivers?

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I also use Modelsim (privately) and I have never encountered this issue. Also initializing with '-' resulted in 'U' as well.

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Xilinx Employee
Xilinx Employee
8,609 Views
Registered: ‎05-07-2015

Re: ISIM loop unrollment gives multiple drivers?

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HI @pietervanderstar

 

 Yes VHDL  behavioural simulation of ISE/Vivado and third party tools might differ in the aspect that the xilinx tools  simulate the signals as 9 valued std_logic elements.
Though I am not quite sure about this, Modelsim/Questasim  converts 9 valued std_logic to 4 valued  net logic(0,1,Z,X) even  at behavioural simulation level to achieve faster simulation. Hence such issues may not arise.  

Thanks
Bharath
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8,603 Views
Registered: ‎09-10-2015

Re: ISIM loop unrollment gives multiple drivers?

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That could be though 'U' is given to uninitialized values. But we're drifting off-topic. :)

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