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floorbalint
Observer
Observer
671 Views
Registered: ‎07-31-2017

ISim blocking and nonblocking statements

Hello,

I search a lot about blocking and non blocking statements, and I wrote a simple test project for testing these statements. This is the code:

module register_test2(
input clk,
input rst,
input in1,
output out1
);

reg TestReg1;

wire test_wire;

assign test_wire = in1;

always @ (posedge clk)
begin
if(rst)
TestReg1 <= 0;
else
begin
TestReg1 <= test_wire;
end
end

assign out1 = TestReg1;

endmodule

I wrote a realy simple test fixture for this modul, where I gave values to the in1 input in the initial begin sequence, and made a clock in an always block.:

	initial begin
		// Initialize Inputs
		clk = 0;
		rst = 0;
		in1 = 0;
		// Wait 100 ns for global reset to finish
		#105;
		// Add stimulus here
				rst = 1;
		#10 	rst = 0;
		#50
		#10 in1 = 1;
		#10 in1 = 1;
		#10 in1 = 0;
		#10 in1 = 1;
		#10 in1 = 0;
		#10 in1 = 0;
		#10 in1 = 1;
		#10 in1 = 0;
	end
	
	always #5 clk = ~clk;

In the test fixture in the initial block and the clock-always block I made all possible variation of the blocking an non blocking statements. These are the results:

Clock: blocking, Initial: nonblocking:

clk: blocking, inputs: non-blockingclk: blocking, inputs: non-blocking

Every other case:

Clock: blocking, Initial: blocking

Clock: nonblocking, Initial: blocking

Clock: nonblocking, Initial: nonblocking

Other casesOther cases

As I understand it, because I use register, the register gets its value at every posedge. The value it gets, the value which is in its input BEFORE the posedge. (With real registers I think this is caused by the register's setup and hold time)

My question: why the ISim works like I wrote it. I expect, because I simulate a register, every case works like the "Clock: blocking, Initial: nonblocking:" case. How can I figure out, what is the theoretical operation for the ISim in these cases?

 

Thank You for Your help!

Regards
Balint

 

 

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1 Reply
amaccre
Moderator
Moderator
620 Views
Registered: ‎04-24-2013

Hi @floorbalint,

I don't understand what the question is here, can you provide more detail about the issue that you are seeing?

Thanks
Aidan

 

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