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Visitor laczol23
Visitor
313 Views
Registered: ‎05-15-2018

In Vivado cannot add bus like signals to waveform

I have a 16 bit bus in the design, but in the Synthesized design all signals of the bus appear as separate signals. But anyway, they are different signals from [0:0] to [15:15], every one of them on a different probe input of the ila core. So in the Waveform window, I opened the Add probes window, selected the 16 signals, and added them to the waveform.

Add probes.jpgAdd probes

Unfortunately all the added signals became [0:0].

Waveform.jpgThe same signals in Waveform

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10 Replies
Xilinx Employee
Xilinx Employee
292 Views
Registered: ‎05-14-2008

Re: In Vivado cannot add bus like signals to waveform

First, to see if this is a naming issue or a connection issue, do you see those signals connected to ILA probes as expected in the Implemented design? You can check this by Schematic.

-vivian

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Visitor laczol23
Visitor
284 Views
Registered: ‎05-15-2018

Re: In Vivado cannot add bus like signals to waveform

Yes, I can see the signals connected to the ILA core. On the left you can see the i_system block, on the right the u_ila_0 block.

Implemented design.jpgImplemented design

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Voyager
Voyager
270 Views
Registered: ‎03-28-2016

Re: In Vivado cannot add bus like signals to waveform

From what I see of your screen capture, your 16-bit bus has been split out into 16 individual nets.  I would suggest a couple of options:

1) In the waveform viewer you can define a "virtual bus" and add each of the 16 probes to it,

2) In your BD, use a "concat" block to bundle the 16 nets back into a a 16-bit bus, then connect the bus to one port of the ILA.

Ted Booth - Tech. Lead FPGA Design Engineer
www.designlinxhs.com
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Visitor laczol23
Visitor
262 Views
Registered: ‎05-15-2018

Re: In Vivado cannot add bus like signals to waveform

OK, thank you. But I still have questions.

1. I defined a Virtual bus, but how can I add a probe to it? Yes, I can add a [0:0] to it, simple move the signal on the virtual bus. But I cannot add [1:1], because the main problem is, that I cannot add [1:1] to the waveform.

2. In BD (Block Design) these are already a bus. Only in the Synthesis Design has it been split to individual nets.

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Xilinx Employee
Xilinx Employee
252 Views
Registered: ‎05-14-2008

Re: In Vivado cannot add bus like signals to waveform

Can you try "write_debug_probes" command to generate the ltx file in the implemented design?

And use this new generated ltx file to replace the original one that was generated along with the bit file.

-vivian

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Visitor laczol23
Visitor
247 Views
Registered: ‎05-15-2018

Re: In Vivado cannot add bus like signals to waveform

I regenerated the ltx file from command line. It is practically the same. But as I read it, I wonder, if I can edit it manually. I can see what is the difference between a single net and a bus.

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Visitor andregnad
Visitor
161 Views
Registered: ‎06-21-2018

Re: In Vivado cannot add bus like signals to waveform

Has anyone found a solution to this problem? I have the same malfunction (since Vivado version 2018.3). I had hoped it would be fixed with Vivado 2019.1, but unfortunately I still get this bug.

add_wave_error_1.png
add_wave_error_2.png
add_wave_error_ltx_file.png
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Xilinx Employee
Xilinx Employee
153 Views
Registered: ‎05-14-2008

Re: In Vivado cannot add bus like signals to waveform

@andregnad Could you provide your project for us to reproduce the issue?

-vivian

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Xilinx Employee
Xilinx Employee
152 Views
Registered: ‎05-14-2008

Re: In Vivado cannot add bus like signals to waveform

@laczol23 I think you can try to edit the .ltx file.

What's more, could you provide your project for us to reproduce the issue?

-vivian

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Visitor andregnad
Visitor
136 Views
Registered: ‎06-21-2018

Re: In Vivado cannot add bus like signals to waveform

What should I change in the .ltx file?

Unfortunately it is not possible for me for legal reasons to give the project to an external partner.

André

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