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Initialization of DRAM data in Vivado Simulation Level

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Explorer
Posts: 162
Registered: ‎08-31-2017
Accepted Solution

Initialization of DRAM data in Vivado Simulation Level

Hi, dear sir,

 

 If we design a DMA for the data movement b/w DRAM and internal Block SRAM, is it possible to preload data to the dram in simulation and so we can focus on the verification of functionality of DMA transfer ? If yes, are there any example to initialize DRAM in Vivado simulation env ?

 

Thanks


Accepted Solutions
Scholar
Posts: 586
Registered: ‎06-16-2013

Re: Initialization of DRAM data in Vivado Simulation Level

Hi @nanson

 

Yes.

It is possible to preload data to the DRAM in simulation, if you use MICRON's dram simulation model.

 

Please refer MICRON's dram simulation model.

But you might have to modify this simulation model for xsim (Vivado).

 

Thank you.

Best regards,

 

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All Replies
Scholar
Posts: 586
Registered: ‎06-16-2013

Re: Initialization of DRAM data in Vivado Simulation Level

Hi @nanson

 

Yes.

It is possible to preload data to the DRAM in simulation, if you use MICRON's dram simulation model.

 

Please refer MICRON's dram simulation model.

But you might have to modify this simulation model for xsim (Vivado).

 

Thank you.

Best regards,