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Visitor
Visitor
3,998 Views
Registered: ‎06-01-2012

Isim PPC405 simulation?

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Has anybody succeeded in simulating PPC405 code execution with XPS, SDK and Isim 14.1?

 

Initially I am trying to simulate a system that implements and runs code OK on real 4VFX140 hardware. The simulation of the same code dies after the first instruction fetch with the following console message:

 

system.ppc405_0.ppc405_0.PPC405_ADV_i.PPC405_ADV_i.ppc405_adv_swift_bw_1.usr_pblk_adv_cap_inst.Iusr_proc_block.Ippc_top.Icpu.PowerPC_405Core.PPC405F6V1Core.core.cacheMMUSch.icu_topSch.icuRamDataFlow.tagArray_Sch.icu_tag.tagSram.i0.m.ReportMsg:1341200:(S103) {xil_ppc405_adv_mod1992}
 The PowerPC 405 core has received X's on an input pin.
 Valid inputs are required before simulation can continue.
  Cell corrupted.

 

I'd just like to know if I'm doing something wrong or this is something that is untested and never going to work.

 

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Visitor
Visitor
4,841 Views
Registered: ‎06-01-2012

Re: Isim PPC405 simulation?

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Got the solution, courtesy of Xilinx Support:

 

http://www.xilinx.com/support/answers/39101.htm

 

It involves a bug in data2mem and the fix is a simple change to the linker script.

 

 

 

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Teacher
Teacher
3,996 Views
Registered: ‎09-09-2010

Re: Isim PPC405 simulation?

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Perhaps a silly question, but have you checked that your testbench is driving all the PPC inpus properly?

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"If it don't work in simulation, it won't work on the board."
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Visitor
Visitor
3,994 Views
Registered: ‎06-01-2012

Re: Isim PPC405 simulation?

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A very good question actually... upon examination XPS doesn't create a testbench for an Isim simulation but just forces the top level system clock and reset. This should be sufficient as all the PPC405 inputs are connected or tied off automatically by XPS lower in the hierarchy. Clearly I need to identify the X's that are causing trouble and how they got there. I'm hoping somebody may have encountered this before.

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Visitor
Visitor
4,842 Views
Registered: ‎06-01-2012

Re: Isim PPC405 simulation?

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Got the solution, courtesy of Xilinx Support:

 

http://www.xilinx.com/support/answers/39101.htm

 

It involves a bug in data2mem and the fix is a simple change to the linker script.

 

 

 

View solution in original post

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