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Visitor floke
Visitor
8,105 Views
Registered: ‎05-11-2010

Isim natural counter exceeds its range

When I try to simulate a signal cnt defined as "natural range 0 to A" in Isim the counter can count passed the upper range "A" without warning.

counter code snippet below (and testbench in attachment):

 

signal cnt : natural range 0 to test_period_c := 0;
begin

...
elsif rising_edge(clk) then -- rising clock edge
if cnt <= test_period_c then
cnt <= cnt +1;
end if;

....

 

There is no stop condition for the counter in the code. Is it undefined what should happen in that case? I thought that a warning or error should come.

Isim version is 13.4

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21 Replies
Visitor floke
Visitor
8,104 Views
Registered: ‎05-11-2010

Re: Isim natural counter exceeds its range

Attachment didnt work: code is pasted here instead

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Professor
Professor
8,077 Views
Registered: ‎08-14-2007

Re: Isim natural counter exceeds its range

I can confirm that the same behavior occurs in ISE 14.6 (Isim).  I didn't trry Modelsim.  That being said, it's not clear that there is a requirement to warn you about exceeding the natural range.  I also expect that if you synthesized this code, given the range of 0 to 3, you'd end up with a 2-bit counter that couldn't exceed its range (you could try post-translate simulation to verify this).  Nevertheless, given a natural range 0 to 3, then 3 + 1 isn't explicitly defined.  Synthesis is allowed to treat this as a don't care, which usually means the logic is optimized to just wrap to 0 in this case.  If your range had a non-power-of-two number of states, it could continue to count up in hardware as well.

-- Gabor
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Professor
Professor
8,076 Views
Registered: ‎08-14-2007

Re: Isim natural counter exceeds its range

OK, I tried Modelsim 6.6g:

 

run
# ** Fatal: (vsim-3421) Value 4 is out of range 0 to 3.
#    Time: 60 ns  Iteration: 0  Process: /natural_cnt_tb/dut/natural_cnt_proc File: C:/Projects/junkola/natural_cnt.vhdl
# Fatal error in Process natural_cnt_proc at C:/Projects/junkola/natural_cnt.vhdl line 24
#
# HDL call sequence:
# Stopped at C:/Projects/junkola/natural_cnt.vhdl 24 Process natural_cnt_proc
#

 

Looks pretty bad.  Not sure why Isim has no issues with this code...

-- Gabor
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Professor
Professor
8,072 Views
Registered: ‎08-14-2007

Re: Isim natural counter exceeds its range

I also tried post-translate sim (using 14.6 target device Artix-7) and it does what I would have expected, wrapping to zero when you increment from 3.

-- Gabor
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Historian
Historian
8,066 Views
Registered: ‎02-25-2008

Re: Isim natural counter exceeds its range


@gszakacs wrote:

I can confirm that the same behavior occurs in ISE 14.6 (Isim).  I didn't trry Modelsim.  That being said, it's not clear that there is a requirement to warn you about exceeding the natural range. 


oh, yes there is! That is the entire point of declaring a natural (or integer) with a range limit. If you attempt to assign a value outside of the range, you should, per the LRM, get an ERROR indicating that is the case. 


I also expect that if you synthesized this code, given the range of 0 to 3, you'd end up with a 2-bit counter that couldn't exceed its range (you could try post-translate simulation to verify this)


 If you declare:

 

    constant FOOMAX : natural := 10;

    signal foo : natural range 0 to FOOMAX - 1;

 

The synthesizer will create a four-bit vector. That vector could very well take on a value between 11 and 15. But since the simulation is supposed to tell you if such an illegal assignment occurs, in a functioning design those illegal assignments can't happen.   


 Nevertheless, given a natural range 0 to 3, then 3 + 1 isn't explicitly defined.  Synthesis is allowed to treat this as a don't care, which usually means the logic is optimized to just wrap to 0 in this case.  If your range had a non-power-of-two number of states, it could continue to count up in hardware as well.


For VHDL synthesis, what happens is by definition unknown. It could wrap around. It could cause water to squirt out of the monitor into your face. It could launch a missile which would obliterate the abomination which replaced Giants Stadium in New Jersey. You can't depend on anything.

 

If you have a counter that you want to roll over, you code it explicitly:

 

    counter : process (clk) is

    begin

        if rising_edge(clk) then

            if reset = '1' then 

                foo <= 0;

            else

                foo <= (foo + 1) mod FOOMAX;

            end if;

        end if;

    end process counter;

 

Note that XST allows for a non-power-of-two modulo in this case, since that modulo is a compile-time constant.

 

if you don't code the modulo, the simulation will fail when the counter exceeds FOOMAX - 1. And again, you can't depend on what the synthesizer will create.

----------------------------Yes, I do this for a living.
Visitor floke
Visitor
8,044 Views
Registered: ‎05-11-2010

Re: Isim natural counter exceeds its range

Thanks for your great answers, very helpful.

I've been using this kind of signals with range throughout my design. Now that seems a bit dangerous with Isim. What other conditions might my Isim testbenches have missed...

Buying Modelsim is not an option for me. Do you have any other idea to avoid these kind of error until Xilinx fix Isim (if they do)?

 

Bassman, very nice and simple wraparound counter design! 

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Historian
Historian
8,036 Views
Registered: ‎02-25-2008

Re: Isim natural counter exceeds its range


@floke wrote:

Thanks for your great answers, very helpful.

I've been using this kind of signals with range throughout my design. Now that seems a bit dangerous with Isim. What other conditions might my Isim testbenches have missed...

Buying Modelsim is not an option for me. Do you have any other idea to avoid these kind of error until Xilinx fix Isim (if they do)?


 

Certainly I hope that someone from the ISim team sees this and acknowledges it as a bug.

Unfortunately, there are few low-cost options for HDL simulation.

 


Bassman, very nice and simple wraparound counter design! 


 

thanks, but it's the standard template for that sort of thing.

----------------------------Yes, I do this for a living.
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Teacher muzaffer
Teacher
8,028 Views
Registered: ‎03-31-2012

Re: Isim natural counter exceeds its range

Does the same problem exist in Vivado simulator? In behavioral simulation there is no reason not to run Vivado even if your final target is not a 7 series chip.
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Teacher rcingham
Teacher
8,018 Views
Registered: ‎09-09-2010

Re: Isim natural counter exceeds its range

Perhaps a redundant question, but what happens if you declare as:

signal cnt : integer range 0 to test_period_c := 0;

------------------------------------------
"If it don't work in simulation, it won't work on the board."
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Historian
Historian
6,914 Views
Registered: ‎02-25-2008

Re: Isim natural counter exceeds its range


muzaffer wrote:
Does the same problem exist in Vivado simulator? In behavioral simulation there is no reason not to run Vivado even if your final target is not a 7 series chip.

Do the libraries available to Vivado's simulator include the non-7 devices? If my S6 design has instantiations of a DCM and DDR flops, the simulator needs to have models for them.

----------------------------Yes, I do this for a living.
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Historian
Historian
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Registered: ‎02-25-2008

Re: Isim natural counter exceeds its range


@rcingham wrote:
Perhaps a redundant question, but what happens if you declare as:

signal cnt : integer range 0 to test_period_c := 0;

The simulator should throw an error if the signal is assigned a value outside of the range, regardless of whether the signal is a natural or integer. 

 

If it throws an error on an integer and not a natural, something is really horribly wrong.

----------------------------Yes, I do this for a living.
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Teacher muzaffer
Teacher
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Registered: ‎03-31-2012

Re: Isim natural counter exceeds its range

For those specific cores I am pretty sure they exist in behavioral model format. I use the Vivado simulator in non-project configuration so I don't even tell it what chip I am targeting and it knows how to handle DCMs (never used DDR flops).
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Teacher rcingham
Teacher
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Registered: ‎09-09-2010

Re: Isim natural counter exceeds its range


@bassman59 wrote:

@rcingham wrote:
Perhaps a redundant question, but what happens if you declare as:

signal cnt : integer range 0 to test_period_c := 0;

The simulator should throw an error if the signal is assigned a value outside of the range, regardless of whether the signal is a natural or integer. 

 

If it throws an error on an integer and not a natural, something is really horribly wrong.


Exactly - just how horribly wrong is this situation...


------------------------------------------
"If it don't work in simulation, it won't work on the board."
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Moderator
Moderator
6,866 Views
Registered: ‎04-17-2011

Re: Isim natural counter exceeds its range

Sorry everyone, should have noted this discussion before. 

The issue is related to rangecheck which is disabled by default in ISIM & Vivado Simulator. Hence, it ignores the range values which Modelsim was catching. To enable it go to ISIM Simulation Properties and turn-on -rangecheck:

 

ISIM.PNG

 

With that ISIM would stop when the cnt reaches 4:

 

Sim P.68d (signature 0xfbc00daa)
This is a Full version of ISim.
Time resolution is 1 ps
Simulator is doing circuit initialization process.
Finished circuit initialization process.
ERROR: In process natural_cnt.vhdl:natural_cnt_proc
value 4 is out of valid range 0 to 3
INFO: Simulator is stopped.

Same would be the behavior in Vivado Simulator.

Hope this clarifies everyone's doubt.

Happy Simulating!!

Regards,
Debraj
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Professor
Professor
6,858 Views
Registered: ‎08-14-2007

Re: Isim natural counter exceeds its range

The issue is related to rangecheck which is disabled by default in ISIM & Vivado Simulator.

 

This seems like an odd default.  Was the idea to reduce simulation time?  I would think the default should be to match the requirements of the VHDL LRM.

-- Gabor
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Moderator
Moderator
6,850 Views
Registered: ‎04-17-2011

Re: Isim natural counter exceeds its range

Hi Gabor,
The rangecheck switch was disabled by default as it causes compiler to generate extra code for range check and will slow down the simulation. Customers have a flexibility to either turn it on when they want tool to perform rangecheck.

Regards,
Debraj
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Historian
Historian
6,845 Views
Registered: ‎02-25-2008

Re: Isim natural counter exceeds its range


@debrajr wrote:
Hi Gabor,
The rangecheck switch was disabled by default as it causes compiler to generate extra code for range check and will slow down the simulation. Customers have a flexibility to either turn it on when they want tool to perform rangecheck.


It's the wrong default. 

Especially when the customers don't realize that such an option exists, and thus time is wasted trying to determine why the simulator doesn't do what the LRM specifies and the user expects.

----------------------------Yes, I do this for a living.
Teacher muzaffer
Teacher
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Registered: ‎03-31-2012

Re: Isim natural counter exceeds its range

I think you are missing the point; It is more important that the simulation be fast than be correct.
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Professor
Professor
6,839 Views
Registered: ‎08-14-2007

Re: Isim natural counter exceeds its range


@muzaffer wrote:
I think you are missing the point; It is more important that the simulation be fast than be correct.

I think you forgot the smiley-wink emoticon.

-- Gabor
Moderator
Moderator
3,056 Views
Registered: ‎04-17-2011

Re: Isim natural counter exceeds its range

Thanks everyone. Point noted. Would highlight this for Vivado Simulator. It would be very difficult to bring in any change in ISIM at this point of time.
Regards,
Debraj
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Historian
Historian
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Registered: ‎02-25-2008

Re: Isim natural counter exceeds its range


@debrajr wrote:
. It would be very difficult to bring in any change in ISIM at this point of time.

Well, that's too bad, because a lot of your customers still use that tool, and if it's broken, their confidence in Xilinx' products -- read: FPGA DEVICES -- is reduced.

 

Yes, we know that Xilinx has deprecated ISIM and ISE. 

 

Some of us can't use the newest shiniest parts. So we use the tools provided. That the tools are broken in some ways is apparently not interesting to Xilinx.

----------------------------Yes, I do this for a living.
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