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Visitor gguichal
Visitor
6,630 Views
Registered: ‎05-18-2016

Launching simulation inModelsim from Vivado with additional libraries not available as sources in Vivado project.

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I would like to know how to use Vivado as an IDE and launch a simulation from Vivado using a testbench toplevel that includes the DUT and references to external packages and libraries, that will only be used downstream in Modelsim. Those sources are not added as libraries or source code in Vivado. Those libs are pre-compiled in Modelsim, so they should work correctly if I am able to launch Modelsim. I want Vivado to do the work of adding the synthesis source file hierarchy and TB toplevel.

 

My TB toplevel in VHDL incudes references to libraries and packages from my VHDL framework the DUT instance and instanecs of my TB components. I don't want to add everyting in Vivado, just the DUT hierarchy and TB toplevel, so the sources for the TB components are not included in the Vivado project.

 

It seems it is just that when vcom is invoked the library mappings are not there, so I get an error from Modelsim. I added those libraries to modelsim.ini in the Modelsim installation path, but I tihnk they may need to be added somewhere else. Maybe in some modelsim.ini "template" Vivado uses (?).

 

For example, for a simple project and working TB (I tried from Modelsim) the SIM source hierarchy looks like this:

 

  - prueba2_tb_top - struct (registros_bls_tb_struct.vhd),
  --  DUT - registros_top - rtl (registros_top.vhd),
  ---    U0 - registro - rtl (regstro.vhd),
  ---    U1 - registro_slv - rtl (registro_slv.vhd)
  --  UT0 - tb_command_reader (?),
  --  UT1 - tb_clock_gen (?),
  --  UT2 - tb_signal_sl (?),
   -- UT3 - tb_signal_slv (?),

 

Al the UTx are TB components included in the "bls_tb_lib" library, so Vivado doesn't know what souce file they may be found in.

 

When I launch Simulation (behavioral) I get the following tcl console log:

 

# QuestaSim-64 vcom
# -- Loading package STANDARD
... (loads some standard packages OK)

# -- Compiling entity registro_slv
# -- Compiling architecture rtl of registro_slv
 ...(Compiles the DUT hierarchy OK)
# -- Compiling entity prueba2_tb_top
# -- Loading package STD_LOGIC_UNSIGNED
# ** Error: (vcom-11) Could not find bls_tb_pkg_lib.basicdefs.
#
# ** Error: ./../../../../../hdl/registros_bls_tb_struct.vhd(35): (vcom-1195) Cannot find expanded name "bls_tb_pkg_lib.BasicDefs"

....

and so on for every package in the "bls_tb_lib" library.

 

----------

 

an anybody tell me where I can define those library mappings in a simple manner so that they will be loaded before trying to compile the source that references them?

 

This is actually for a class with students that are starting out with some advanced RTL design and I do not want to make it as simple as possible for them.

 

Thanks a lot-.

 

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Visitor gguichal
Visitor
12,677 Views
Registered: ‎05-18-2016

Re: Launching simulation inModelsim from Vivado with additional libraries not available as sources in Vivado project.

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Aghhhhh! To answer my own question, adding the needed library mappings to modelsim.ini file in the Modelsim/Questa install directory will work.

 

I made an error when recopiling the libs and they were being compiled one level up from what I expected, which is where the library was defined. That is why the packages could not be found.

 

 

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Visitor gguichal
Visitor
6,607 Views
Registered: ‎05-18-2016

Re: Launching simulation inModelsim from Vivado with additional libraries not available as sources in Vivado project.

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I would need to add theTo solve this I need the vmap commands for my sim libraries to be added to the compile ".do" file that is automatically generated.

 

For example, for my prject the xil_defaultlib is mapped in the do, and I added the new mappings and that modifies the generated modelsim.ini and everything compiles correctly

 

# ORIGINAL LINE FROM XILINX generated compile .DO file

C:\\FPGA\\questasim64_10.2c\\win64\\vmap xil_defaultlib msim/xil_defaultlib

 

# ADDED MANUALLY TO TEST WHAT I NEED TO DO..

C:\\FPGA\\questasim64_10.2c\\win64\\vmap bls_tb_pkg_lib D:/Proyectos/Balseiro/SHARED/FPGA/bls_tb_pkg_lib/work/
C:\\FPGA\\questasim64_10.2c\\win64\\vmap bls_tb_lib     D:/Proyectos/Balseiro/SHARED/FPGA/bls_tb_lib/work/

 

 

 

 

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Visitor gguichal
Visitor
12,678 Views
Registered: ‎05-18-2016

Re: Launching simulation inModelsim from Vivado with additional libraries not available as sources in Vivado project.

Jump to solution

Aghhhhh! To answer my own question, adding the needed library mappings to modelsim.ini file in the Modelsim/Questa install directory will work.

 

I made an error when recopiling the libs and they were being compiled one level up from what I expected, which is where the library was defined. That is why the packages could not be found.