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Registered: ‎04-17-2019

Simulation with BRAM IP - COE File Updated But Simulated Contents Do Not

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I have several BRAM IPs in a block diagram that I am simulating along with VHDL files. The contents of the BRAMs are initialized using COE files. The issue I am running into is that when I update the COE files, the BRAM's contents in simulation do not update. It makes no difference whether the simulation is relaunched or closed and started fresh. It seems as though there is a cache of simulation files related to these IPs that Vivado is allowing to go stale. Does anyone know where these files might be?

Details:

 - I am using Vivado 2019.2 and generating the IP with Block Memory Generator 8.4. The original and updated COE files all validate successfully.

 - Deleting the entire projectname.sim folder does not fix the issue.

 - Re-customizing the IP does not fix the issue. Even disabling the COE file initialization, generating output products, re-enabling COE file initialization, and re-generating output products does not cause simulation results to be updated.

 - Restarting Vivado does not fix the issue. Restarting the computer does not fix it either.

 - The only fix that I have found is to delete the entire project and regenerate it. Fortunately I generate this project with TCL scripts (as I've run into too many past problems that required this solution) so it's a fairly straightforward but very time consuming task.

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Advisor
Advisor
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Registered: ‎01-28-2008

Hi,

  I've seen a similar case of simulation "cache" not updating when modified. In those cases I generally reset the IP to re-generate, delete the project .sim directory, as you have done, and also delete the project.ip_user_files directory and re-launching the sim.

 

Thanks,

-Pat

 

Give kudos if helpful. Accept as solution if it solves your problem.
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Advisor
Advisor
322 Views
Registered: ‎01-28-2008

Hi,

  I've seen a similar case of simulation "cache" not updating when modified. In those cases I generally reset the IP to re-generate, delete the project .sim directory, as you have done, and also delete the project.ip_user_files directory and re-launching the sim.

 

Thanks,

-Pat

 

Give kudos if helpful. Accept as solution if it solves your problem.
https://tuxengineering.com/blog

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Moderator
Moderator
282 Views
Registered: ‎07-16-2008

I'd suggest that you reset IP output product prior to regenerating IP output product.

When IP customization is not changed, the previous IP cached result will be referenced. In simulation, .coe is not used directly. Instead, the associated .mif file is used. So if IP output product is actually untouched, there's no difference in simulation.

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231 Views
Registered: ‎04-17-2019

Thanks Patocarr & Graces! Resetting the IP products was the key. For those not experienced with the procedure, don't become discouraged when the option is greyed out in the Sources/Hierarchy tab. Switch to IP Sources, right click on the Block Design containing the IP, (or the IP itself if not contained in a BD) and select Reset Output Products.

At first I couldn't figure out how to reset the output products so I tried just deleting the sim & ip_user_files directories. When the ip_user_files directory was recreated the updated COE file was present but the corresponding MIF file contained the old data (viewable in a text editor). Vivado appears to have a bug that allows these two files to be out of sync. Since 2019.2.1 is a pretty recent version, I'll see if I can submit a bug report about this.

Thanks All!

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