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Registered: ‎01-07-2020

Trying again to post: xelab crashes with SIGSEGV Vivado 2019.2

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I have been translating a 1980s schematic for a PDP10 mainframe to SystemVerilog. Things have been going very well until I encountered a crash in xelab when trying to start a sim.

I have tried to find a minimum subset to repro the issue, but each thing I cut out makes it fail for other reasons. It's an intricate mess because I'm basically building RTL to represent the original intricate mess from the 1980s.

Can you help me find how to work around this or if it's a real Xilinx bug, or if it's caused by my own lack of experience? I'm new to Verilog, so please be gentle.

Apparently my original post of this query was marked as spam because I used a link to github for the source code. I have enclosed the source as a tarball.

To repro go to

kl10.sim/kl10pv/behav/xsim/

and run

./compile.sh
./elaborate.sh
$ ./elaborate.sh 
xelab -wto d6bd9f2d678743fd9b60b8d99f7bf270 --incr --debug typical --relax --mt 8 -d KL10PV_TB=1 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot kl10pv_tb_behav xil_defaultlib.kl10pv_tb xil_defaultlib.glbl -log elaborate.log
Vivado Simulator 2019.2
Copyright 1986-1999, 2001-2019 Xilinx, Inc. All Rights Reserved.
Running: /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab -wto d6bd9f2d678743fd9b60b8d99f7bf270 --incr --debug typical --relax --mt 8 -d KL10PV_TB=1 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot kl10pv_tb_behav xil_defaultlib.kl10pv_tb xil_defaultlib.glbl -log elaborate.log 
Using 8 slave threads.
Starting static elaboration
Pass Through NonSizing Optimizer
Completed static elaboration
Starting simulation data flow analysis
ERROR: [XSIM 43-3316] Signal SIGSEGV received.
Printing stacktrace...

[0] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x492003]
[1] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53537e]
[2] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53738c]
[3] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriBinaryOperator&)+0x121) [0x7f174fc7f4b1]
[4] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53b0a7]
[5] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriBinaryOperator&)+0x121) [0x7f174fc7f4b1]
[6] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53b0a7]
[7] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriBlockingAssign&)+0xf8) [0x7f174fc7d7d8]
[8] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriEventControlStatement&)+0xf9) [0x7f174fc7f709]
[9] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x54d321]
[10] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriAlwaysConstruct&)+0xa9) [0x7f174fc7bf89]
[11] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x52231f]
[12] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f174fc79d56]
[13] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53db6e]
[14] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x52b352]
[15] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f174fc79d56]
[16] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53db6e]
[17] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x52b352]
[18] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f174fc79d56]
[19] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53db6e]
[20] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x52b352]
[21] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f174fc79d56]
[22] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53db6e]
[23] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x52b352]
[24] /opt/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f174fc79d56]
[25] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x53db6e]
[26] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x52a1ed]
[27] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x48ebf8]
[28] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x46ec99]
[29] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x4802f6]
[30] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x45241d]
[31] /lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0xf3) [0x7f174e9ab1e3]
[32] /opt/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x46a3d0]

Done

Thanks!

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Visitor
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Registered: ‎01-07-2020

Re: Trying again to post: xelab crashes with SIGSEGV Vivado 2019.2

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Apparently the cause was nested modules. I replaced them with good old fashionied `define macros and all is well now. Really, Xilinx, if it doesn't work you should simply make it fail during compile, shouldn't you? Maybe I used it wrong. I would like to understand what I did that was wrong if anyone gets around to answering this. Thanks.

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Visitor
Visitor
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Registered: ‎01-07-2020

Re: Trying again to post: xelab crashes with SIGSEGV Vivado 2019.2

Jump to solution

Apparently the cause was nested modules. I replaced them with good old fashionied `define macros and all is well now. Really, Xilinx, if it doesn't work you should simply make it fail during compile, shouldn't you? Maybe I used it wrong. I would like to understand what I did that was wrong if anyone gets around to answering this. Thanks.

View solution in original post

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