Verilog Literals

[ahmed_alfadhel]

Hi @dgisselq ,

Could you pls, illustrate these two literals (Blue-Cirlced) :

What is dead_beaf !?  

What is 100_000_000 ?

Note : this picture from lsn_01

Thanks

[dgisselq · Accepted solution]

@ahmed_alfadhel,

Let's step through those.  First, ,both example literals begin with a 32'.  This means they each have 32-bits to them.  One literal is then followed by an `h` indicating a hexadecimal number, while the other is followed by a `d` indicating a decimal number.  Further, Verilog allows underscores within numbers as separators and the parser just ignores them.  Hence, the two numbers might also be written as 0xdeadbeef or 100000000 in a more traditional software context.  Notice how these are harder to read--the 100,000,000 value in particular, because there are so many zeros in it.  The underscores really helped to make it legible, although they didn't adjust its value at all.

Dan

[ahmed_alfadhel]

@dgisselq 

What about the deadbeaf?

could it stands for sth before define it?

Thanks

[dgisselq]

Did you notice that all of the characters in 32'hdead_beef where between a and f?  These are valid hexadecimal characters.  This is a fun number to use since it can also be "read", but it is still a number.  Mapping it to decimal, I get 3,735,928,559.

Note that this is a literal, not a variable.  It begins with a # (i.e. 32).  Variables cannot begin with numbers.  Therefore it doesn't need to be "defined", but rather is a value in its own right.

Dan

[ahmed_alfadhel]

@dgisselq  ,

I am impressed by you. 

Great Thanks for you.