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Observer
Observer
9,388 Views
Registered: ‎05-26-2014

Vivado 2015.4 XSim crashes with SIGSEGV

Setup: Ubuntu 14.04 (Windows 10 does the same) Vivado 2015.4 with VHDL 2008 XSIM. FPGA is Zynq7030
My design Synthesize down to the bit file that I can load into the FPGA. I used a modelsim evaluation license and it compiles without any errors. That makes me believe my VHDL code is fine but XSim has a bug.

When launching Behavioral simulation I get the following error message with a crash SIGSEGV. It does not tell what VHDL line it does not like:

Completed static elaboration
Starting simulation data flow analysis
ERROR: [XSIM 43-3316] Signal SIGSEGV received.
Printing stacktrace...
[0] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c038d]
[1] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c068b]
[2] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlProcedureCallStatement&)+0x34) [0x7f4222f930b4]
[3] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c0871]
[4] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[5] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlElsif&)+0x41) [0x7f4222f92121]
[6] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[7] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlIfStatement&)+0x62) [0x7f4222f92b92]
[8] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[9] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlLoopStatement&)+0x52) [0x7f4222f92aa2]
[10] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bc7bd]
[11] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[12] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlLoopStatement&)+0x52) [0x7f4222f92aa2]
[13] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bc7bd]
[14] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[15] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlIfStatement&)+0x42) [0x7f4222f92b72]
[16] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[17] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlSubprogramBody&)+0x54) [0x7f4222f908e4]
[18] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c0f21]
[19] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[20] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x4f) [0x7f4222f900cf]
[21] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[22] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[23] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[24] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[25] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[26] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[27] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[28] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[29] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[30] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[31] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[32] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[33] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[34] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[35] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[36] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[37] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[38] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[39] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[40] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[41] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[42] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[43] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[44] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[45] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[46] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[47] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[48] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[49] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[50] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[51] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[52] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[53] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[54] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[55] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[56] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[57] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[58] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[59] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[60] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[61] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[62] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[63] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[64] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[65] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[66] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[67] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[68] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[69] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[70] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[71] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[72] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[73] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[74] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[75] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[76] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[77] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[78] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlBlockStatement&)+0xb2) [0x7f4222f92fc2]
[79] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5c018e]
[80] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[81] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[82] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[83] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[84] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[85] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[86] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[87] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[88] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[89] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[90] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[91] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[92] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[93] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[94] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[95] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[96] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[97] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[98] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[99] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[100] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[101] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[102] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[103] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[104] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[105] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[106] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[107] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[108] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[109] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bffb5]
[110] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::TraverseArray(Verific::Array const*)+0x46) [0x7f4222f93586]
[111] /opt/Xilinx/Vivado/2015.4/lib/lnx64.o/libxsimverific.so(Verific::VhdlVisitor::Visit(Verific::VhdlArchitectureBody&)+0x6f) [0x7f4222f900ef]
[112] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5b83b3]
[113] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bf1a4]
[114] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x5bfcc0]
[115] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x59a4b7]
[116] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x49304e]
[117] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x49cb60]
[118] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x4753c8]
[119] /lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0xf5) [0x7f422148cec5]
[120] /opt/Xilinx/Vivado/2015.4/bin/unwrapped/lnx64.o/xelab() [0x491fc5]
Done


Anybody knows a workaround for that?

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7 Replies
Xilinx Employee
Xilinx Employee
9,365 Views
Registered: ‎10-24-2013

Hi @sylvainsgndt

 

Is it possible to attach the project archive here.

Thanks,Vijay
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Moderator
Moderator
9,358 Views
Registered: ‎06-24-2015

Hi @sylvainsgndt,

 

Refer to this forum thread for similar discussion:
https://forums.xilinx.com/t5/Simulation-and-Verification/How-to-debug-this-error-message/m-p/667563/highlight/true#M14740

 

Thanks,
Nupur

Thanks,
Nupur
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Observer
Observer
9,350 Views
Registered: ‎05-26-2014

Hi @vijayak,

 

I'd love to give you my full project. I don't want to publish it "at large" to everybody since it's not open source but part of the company "value". If you give me a way to send it to Xilinx only, I will gladly share my project to help Xilnx investigate the tool crash. I zipped the project folder and it is 808MB (3GB before szipping... no clue how the tool can generate that much data since it's just FPGA without any software/linux stuff). 

 

Sylvain 

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Moderator
Moderator
9,344 Views
Registered: ‎07-01-2015

Hi @sylvainsgndt,

 

Please send me your mail-ID. I will send you an ezmove link to upload your archived project file.

 

Thnaks and Regards,
Arpan 

Thanks,
Arpan
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Observer
Observer
9,339 Views
Registered: ‎05-26-2014

@arpansur

 

if Mail-ID means my email address, here it is sylvain@sgndt.com

 

looking forward to receive it. I will send it right on receiving link

 

Thanks, 

Sylvain

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Observer
Observer
9,335 Views
Registered: ‎05-26-2014

@arpansur

 

Sorry, made a mistake. My email is shuard@sgndt.com  

 

Sylvain

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Moderator
Moderator
9,332 Views
Registered: ‎07-01-2015

Hi @sylvainsgndt,

 

I sent you an ezmove package in the mail-ID provided by you.

Please upload the project file in that package.

 

Thanks and Regards,
Arpan

Thanks,
Arpan
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