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gabich
Newbie
Newbie
3,300 Views
Registered: ‎07-26-2017

Vivado 2017.2 compile_simlib error

I was trying to compile the unisim lib to ModelSim soi have got some errors.

 

Vivado% compile_simlib -library unisim -simulator modelsim -directory {/soft64/altera/17.0/modelsim_ase} -verbose -force
INFO: [Vivado 12-4753] Extracting data from the IP repository...(this may take a while, please wait)...
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INFO: [setup_ip_static_library-Tcl-23] Data extracted from repository. Inspected 356 IP libraries.
Library Source Paths => '/soft64/xilinx/Vivado/2017.2/data /soft64/xilinx/Vivado/2017.2/ids_lite/ISE'
Current Working Directory => '/home/gabich'
Compilation Mode = FAST
Compilation Format = 64-bit
Execute Mode = ON
Execute Platform = lin64
Scheduling library installation & compilation for architectures: all
Scheduling library installation & compilation for libraries: unisim xpm
Signature:-
------------------------------------------------------------------------------
compile_simlib -library unisim -simulator modelsim -directory /soft64/altera/17.0/modelsim_ase -verbose -force
------------------------------------------------------------------------------
Executing cmd '/soft64/altera/17.0/modelsim_ase/linuxaloem/vcom -version -64' with output '.cxl.modelsim.version' (Wed Jul 26 19:01:34 2017)...
compile_simlib[exe]: The command line '/soft64/altera/17.0/modelsim_ase/linuxaloem/vcom -version -64' returned exit code '7'.
Compiling libraries for 'modelsim' simulator in '/soft64/altera/17.0/modelsim_ase'
Executing cmd '/soft64/altera/17.0/modelsim_ase/linuxaloem/vlib /soft64/altera/17.0/modelsim_ase/secureip' (Wed Jul 26 19:01:34 2017)...
compile_simlib[exe]: The command line '/soft64/altera/17.0/modelsim_ase/linuxaloem/vlib /soft64/altera/17.0/modelsim_ase/secureip' returned exit code '0'.
Executing cmd '/soft64/altera/17.0/modelsim_ase/linuxaloem/vmap secureip /soft64/altera/17.0/modelsim_ase/secureip' with output '/soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.log' (Wed Jul 26 19:01:34 2017)...
compile_simlib[exe]: The command line '/soft64/altera/17.0/modelsim_ase/linuxaloem/vmap secureip /soft64/altera/17.0/modelsim_ase/secureip' returned exit code '0'.
Compiling verilog library 'secureip'...Executing cmd '/soft64/altera/17.0/modelsim_ase/linuxaloem/vlog -source -novopt -64 -work secureip -f /soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.cmf' with output '/soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.log' (Wed Jul 26 19:01:34 2017)...
compile_simlib[exe]: The command line '/soft64/altera/17.0/modelsim_ase/linuxaloem/vlog -source -novopt -64 -work secureip -f /soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.cmf' returned exit code '7'.
Executing cmd '/soft64/altera/17.0/modelsim_ase/linuxaloem/vlog -source -novopt -64 -sv -suppress vlog-2583 -work secureip -f /soft64/altera/17.0/modelsim_ase/secureip/.cxl.systemverilog.secureip.secureip.lin64.cmf' with output '/soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.log' (Wed Jul 26 19:01:34 2017)...
compile_simlib[exe]: The command line '/soft64/altera/17.0/modelsim_ase/linuxaloem/vlog -source -novopt -64 -sv -suppress vlog-2583 -work secureip -f /soft64/altera/17.0/modelsim_ase/secureip/.cxl.systemverilog.secureip.secureip.lin64.cmf' returned exit code '7'.
Reading the cxl log file - '/soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.log' for warnings...
Generating the cxl result file - '/soft64/altera/17.0/modelsim_ase/secureip/.cxl.verilog.secureip.secureip.lin64.rpt' ...
compile_simlib: 2 error(s), 0 warning(s), 0.35 % complete

 

(...)

ERROR: [Vivado 12-3591] compile_simlib failed to compile for modelsim with 295 errors.
compile_simlib: Time (s): cpu = 00:00:37 ; elapsed = 00:01:02 . Memory (MB): peak = 2130.637 ; gain = 229.539 ; free physical = 7979 ; free virtual = 20594
ERROR: [Common 17-39] 'compile_simlib' failed due to earlier errors.

 

The full text is attached.

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graces
Moderator
Moderator
3,265 Views
Registered: ‎07-16-2008

It looks you're targetting Modelsim Altera edition rather than standard release. This is not supported.

For compatible 3rd party tools, please refer to Vivado release notes.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug973-vivado-release-notes-install-license.pdf

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